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Commit 6fe70aae authored by John W. Linville's avatar John W. Linville
Browse files

Merge branch 'master' of... 

Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-next-2.6 into for-davem
parents 278554bd 0c348d7c

drivers/net/wireless/ath/ar9170/usb.c

+2 −0
Original line number Diff line number Diff line
@@ -110,6 +110,8 @@ static struct usb_device_id ar9170_usb_ids[] = { 
	{ USB_DEVICE(0x0409, 0x0249) },

	/* AVM FRITZ!WLAN USB Stick N 2.4 */

	{ USB_DEVICE(0x057C, 0x8402), .driver_info = AR9170_REQ_FW1_ONLY },

	/* Qwest/Actiontec 802AIN Wireless N USB Network Adapter */

	{ USB_DEVICE(0x1668, 0x1200) },



	/* terminate */

	{}

drivers/net/wireless/ath/ath5k/base.c

+6 −6
Original line number Diff line number Diff line
@@ -1932,12 +1932,6 @@ ath5k_tasklet_rx(unsigned long data) 


		sc->stats.rx_all_count++;



		if (unlikely(rs.rs_more)) {

			ATH5K_WARN(sc, "unsupported jumbo\n");

			sc->stats.rxerr_jumbo++;

			goto next;

		}



		if (unlikely(rs.rs_status)) {

			if (rs.rs_status & AR5K_RXERR_CRC)

				sc->stats.rxerr_crc++;
@@ -1977,6 +1971,12 @@ ath5k_tasklet_rx(unsigned long data) 
					sc->opmode != NL80211_IFTYPE_MONITOR)

				goto next;

		}



		if (unlikely(rs.rs_more)) {

			sc->stats.rxerr_jumbo++;

			goto next;



		}

accept:

		next_skb = ath5k_rx_skb_alloc(sc, &next_skb_addr);

drivers/net/wireless/ath/ath9k/ar9003_eeprom.c

+76 −98
Original line number Diff line number Diff line
@@ -38,6 +38,9 @@ 
#define AR_SWITCH_TABLE_ALL (0xfff)

#define AR_SWITCH_TABLE_ALL_S (0)



#define LE16(x) __constant_cpu_to_le16(x)

#define LE32(x) __constant_cpu_to_le32(x)



static const struct ar9300_eeprom ar9300_default = {

	.eepromVersion = 2,

	.templateVersion = 2,
@@ -45,7 +48,7 @@ static const struct ar9300_eeprom ar9300_default = { 
	.custData = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0,

		     0, 0, 0, 0, 0, 0, 0, 0, 0, 0},

	.baseEepHeader = {

		.regDmn = {0, 0x1f},

		.regDmn = { LE16(0), LE16(0x1f) },

		.txrxMask =  0x77, /* 4 bits tx and 4 bits rx */

		.opCapFlags = {

			.opFlags = AR9300_OPFLAGS_11G | AR9300_OPFLAGS_11A,
@@ -76,15 +79,15 @@ static const struct ar9300_eeprom ar9300_default = { 
	.modalHeader2G = {

	/* ar9300_modal_eep_header  2g */

		/* 4 idle,t1,t2,b(4 bits per setting) */

		.antCtrlCommon = 0x110,

		.antCtrlCommon = LE32(0x110),

		/* 4 ra1l1, ra2l1, ra1l2, ra2l2, ra12 */

		.antCtrlCommon2 = 0x22222,

		.antCtrlCommon2 = LE32(0x22222),



		/*

		 * antCtrlChain[AR9300_MAX_CHAINS]; 6 idle, t, r,

		 * rx1, rx12, b (2 bits each)

		 */

		.antCtrlChain = {0x150, 0x150, 0x150},

		.antCtrlChain = { LE16(0x150), LE16(0x150), LE16(0x150) },



		/*

		 * xatten1DB[AR9300_MAX_CHAINS];  3 xatten1_db
@@ -287,12 +290,12 @@ static const struct ar9300_eeprom ar9300_default = { 
	 },

	.modalHeader5G = {

		/* 4 idle,t1,t2,b (4 bits per setting) */

		.antCtrlCommon = 0x110,

		.antCtrlCommon = LE32(0x110),

		/* 4 ra1l1, ra2l1, ra1l2,ra2l2,ra12 */

		.antCtrlCommon2 = 0x22222,

		.antCtrlCommon2 = LE32(0x22222),

		 /* antCtrlChain 6 idle, t,r,rx1,rx12,b (2 bits each) */

		.antCtrlChain = {

			0x000, 0x000, 0x000,

			LE16(0x000), LE16(0x000), LE16(0x000),

		},

		 /* xatten1DB 3 xatten1_db for AR9280 (0xa20c/b20c 5:0) */

		.xatten1DB = {0, 0, 0},
@@ -620,9 +623,9 @@ static u32 ath9k_hw_ar9300_get_eeprom(struct ath_hw *ah, 
	case EEP_MAC_MSW:

		return eep->macAddr[4] << 8 | eep->macAddr[5];

	case EEP_REG_0:

		return pBase->regDmn[0];

		return le16_to_cpu(pBase->regDmn[0]);

	case EEP_REG_1:

		return pBase->regDmn[1];

		return le16_to_cpu(pBase->regDmn[1]);

	case EEP_OP_CAP:

		return pBase->deviceCap;

	case EEP_OP_MODE:
@@ -640,93 +643,80 @@ static u32 ath9k_hw_ar9300_get_eeprom(struct ath_hw *ah, 
		/* Bit 4 is internal regulator flag */

		return (pBase->featureEnable & 0x10) >> 4;

	case EEP_SWREG:

		return pBase->swreg;

		return le32_to_cpu(pBase->swreg);

	default:

		return 0;

	}

}



#ifdef __BIG_ENDIAN

static void ar9300_swap_eeprom(struct ar9300_eeprom *eep)

static bool ar9300_eeprom_read_byte(struct ath_common *common, int address,

				    u8 *buffer)

{

	u32 dword;

	u16 word;

	int i;



	word = swab16(eep->baseEepHeader.regDmn[0]);

	eep->baseEepHeader.regDmn[0] = word;



	word = swab16(eep->baseEepHeader.regDmn[1]);

	eep->baseEepHeader.regDmn[1] = word;



	dword = swab32(eep->baseEepHeader.swreg);

	eep->baseEepHeader.swreg = dword;

	u16 val;



	dword = swab32(eep->modalHeader2G.antCtrlCommon);

	eep->modalHeader2G.antCtrlCommon = dword;

	if (unlikely(!ath9k_hw_nvram_read(common, address / 2, &val)))

		return false;



	dword = swab32(eep->modalHeader2G.antCtrlCommon2);

	eep->modalHeader2G.antCtrlCommon2 = dword;

	*buffer = (val >> (8 * (address % 2))) & 0xff;

	return true;

}



	dword = swab32(eep->modalHeader5G.antCtrlCommon);

	eep->modalHeader5G.antCtrlCommon = dword;

static bool ar9300_eeprom_read_word(struct ath_common *common, int address,

				    u8 *buffer)

{

	u16 val;



	dword = swab32(eep->modalHeader5G.antCtrlCommon2);

	eep->modalHeader5G.antCtrlCommon2 = dword;

	if (unlikely(!ath9k_hw_nvram_read(common, address / 2, &val)))

		return false;



	for (i = 0; i < AR9300_MAX_CHAINS; i++) {

		word = swab16(eep->modalHeader2G.antCtrlChain[i]);

		eep->modalHeader2G.antCtrlChain[i] = word;

	buffer[0] = val >> 8;

	buffer[1] = val & 0xff;



		word = swab16(eep->modalHeader5G.antCtrlChain[i]);

		eep->modalHeader5G.antCtrlChain[i] = word;

	}

	return true;

}

#endif



static bool ar9300_hw_read_eeprom(struct ath_hw *ah,

				  long address, u8 *buffer, int many)

static bool ar9300_read_eeprom(struct ath_hw *ah, int address, u8 *buffer,

			       int count)

{

	int i;

	u8 value[2];

	unsigned long eepAddr;

	unsigned long byteAddr;

	u16 *svalue;

	struct ath_common *common = ath9k_hw_common(ah);

	int i;



	if ((address < 0) || ((address + many) > AR9300_EEPROM_SIZE - 1)) {

	if ((address < 0) || ((address + count) / 2 > AR9300_EEPROM_SIZE - 1)) {

		ath_print(common, ATH_DBG_EEPROM,

			  "eeprom address not in range\n");

		return false;

	}



	for (i = 0; i < many; i++) {

		eepAddr = (u16) (address + i) / 2;

		byteAddr = (u16) (address + i) % 2;

		svalue = (u16 *) value;

		if (!ath9k_hw_nvram_read(common, eepAddr, svalue)) {

			ath_print(common, ATH_DBG_EEPROM,

				  "unable to read eeprom region\n");

			return false;

		}

		*svalue = le16_to_cpu(*svalue);

		buffer[i] = value[byteAddr];

	/*

	 * Since we're reading the bytes in reverse order from a little-endian

	 * word stream, an even address means we only use the lower half of

	 * the 16-bit word at that address

	 */

	if (address % 2 == 0) {

		if (!ar9300_eeprom_read_byte(common, address--, buffer++))

			goto error;



		count--;

	}



	return true;

	for (i = 0; i < count / 2; i++) {

		if (!ar9300_eeprom_read_word(common, address, buffer))

			goto error;



		address -= 2;

		buffer += 2;

	}



static bool ar9300_read_eeprom(struct ath_hw *ah,

			       int address, u8 *buffer, int many)

{

	int it;

	if (count % 2)

		if (!ar9300_eeprom_read_byte(common, address, buffer))

			goto error;



	for (it = 0; it < many; it++)

		if (!ar9300_hw_read_eeprom(ah,

					   (address - it),

					   (buffer + it), 1))

			return false;

	return true;



error:

	ath_print(common, ATH_DBG_EEPROM,

		  "unable to read eeprom region at offset %d\n", address);

	return false;

}



static void ar9300_comp_hdr_unpack(u8 *best, int *code, int *reference,
@@ -927,30 +917,13 @@ static int ar9300_eeprom_restore_internal(struct ath_hw *ah, 
 */

static bool ath9k_hw_ar9300_fill_eeprom(struct ath_hw *ah)

{

	u8 *mptr = NULL;

	int mdata_size;

	u8 *mptr = (u8 *) &ah->eeprom.ar9300_eep;



	mptr = (u8 *) &ah->eeprom.ar9300_eep;

	mdata_size = sizeof(struct ar9300_eeprom);

	if (ar9300_eeprom_restore_internal(ah, mptr,

			sizeof(struct ar9300_eeprom)) < 0)

		return false;



	if (mptr && mdata_size > 0) {

		/* At this point, mptr points to the eeprom data structure

		 * in it's "default" state. If this is big endian, swap the

		 * data structures back to "little endian"

		 */

		/* First swap, default to Little Endian */

#ifdef __BIG_ENDIAN

		ar9300_swap_eeprom((struct ar9300_eeprom *)mptr);

#endif

		if (ar9300_eeprom_restore_internal(ah, mptr, mdata_size) >= 0)

	return true;



		/* Second Swap, back to Big Endian */

#ifdef __BIG_ENDIAN

		ar9300_swap_eeprom((struct ar9300_eeprom *)mptr);

#endif

	}

	return false;

}



/* XXX: review hardware docs */
@@ -998,21 +971,25 @@ static void ar9003_hw_xpa_bias_level_apply(struct ath_hw *ah, bool is2ghz) 
static u32 ar9003_hw_ant_ctrl_common_get(struct ath_hw *ah, bool is2ghz)

{

	struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;

	__le32 val;



	if (is2ghz)

		return eep->modalHeader2G.antCtrlCommon;

		val = eep->modalHeader2G.antCtrlCommon;

	else

		return eep->modalHeader5G.antCtrlCommon;

		val = eep->modalHeader5G.antCtrlCommon;

	return le32_to_cpu(val);

}



static u32 ar9003_hw_ant_ctrl_common_2_get(struct ath_hw *ah, bool is2ghz)

{

	struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;

	__le32 val;



	if (is2ghz)

		return eep->modalHeader2G.antCtrlCommon2;

		val = eep->modalHeader2G.antCtrlCommon2;

	else

		return eep->modalHeader5G.antCtrlCommon2;

		val = eep->modalHeader5G.antCtrlCommon2;

	return le32_to_cpu(val);

}



static u16 ar9003_hw_ant_ctrl_chain_get(struct ath_hw *ah,
@@ -1020,15 +997,16 @@ static u16 ar9003_hw_ant_ctrl_chain_get(struct ath_hw *ah, 
					bool is2ghz)

{

	struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;

	__le16 val = 0;



	if (chain >= 0 && chain < AR9300_MAX_CHAINS) {

		if (is2ghz)

			return eep->modalHeader2G.antCtrlChain[chain];

			val = eep->modalHeader2G.antCtrlChain[chain];

		else

			return eep->modalHeader5G.antCtrlChain[chain];

			val = eep->modalHeader5G.antCtrlChain[chain];

	}



	return 0;

	return le16_to_cpu(val);

}



static void ar9003_hw_ant_ctrl_apply(struct ath_hw *ah, bool is2ghz)

drivers/net/wireless/ath/ath9k/ar9003_eeprom.h

+5 −5
Original line number Diff line number Diff line
@@ -169,7 +169,7 @@ enum CompressAlgorithm { 
};



struct ar9300_base_eep_hdr {

	u16 regDmn[2];

	__le16 regDmn[2];

	/* 4 bits tx and 4 bits rx */

	u8 txrxMask;

	struct eepFlags opCapFlags;
@@ -199,16 +199,16 @@ struct ar9300_base_eep_hdr { 
	u8 rxBandSelectGpio;

	u8 txrxgain;

	/* SW controlled internal regulator fields */

	u32 swreg;

	__le32 swreg;

} __packed;



struct ar9300_modal_eep_header {

	/* 4 idle, t1, t2, b (4 bits per setting) */

	u32 antCtrlCommon;

	__le32 antCtrlCommon;

	/* 4 ra1l1, ra2l1, ra1l2, ra2l2, ra12 */

	u32 antCtrlCommon2;

	__le32 antCtrlCommon2;

	/* 6 idle, t, r, rx1, rx12, b (2 bits each) */

	u16 antCtrlChain[AR9300_MAX_CHAINS];

	__le16 antCtrlChain[AR9300_MAX_CHAINS];

	/* 3 xatten1_db for AR9280 (0xa20c/b20c 5:0) */

	u8 xatten1DB[AR9300_MAX_CHAINS];

	/* 3  xatten1_margin for merlin (0xa20c/b20c 16:12 */

drivers/net/wireless/ath/ath9k/ar9003_initvals.h

+134 −134
Original line number Diff line number Diff line
@@ -25,8 +25,11 @@ static const u32 ar9300_2p0_radio_postamble[][5] = { 
	{0x000160ac, 0xa4653c00, 0xa4653c00, 0x24652800, 0x24652800},

	{0x000160b0, 0x03284f3e, 0x03284f3e, 0x05d08f20, 0x05d08f20},

	{0x0001610c, 0x08000000, 0x00000000, 0x00000000, 0x00000000},

	{0x00016140, 0x10804008, 0x10804008, 0x50804008, 0x50804008},

	{0x0001650c, 0x08000000, 0x00000000, 0x00000000, 0x00000000},

	{0x00016540, 0x10804008, 0x10804008, 0x50804008, 0x50804008},

	{0x0001690c, 0x08000000, 0x00000000, 0x00000000, 0x00000000},

	{0x00016940, 0x10804008, 0x10804008, 0x50804008, 0x50804008},

};



static const u32 ar9300Modes_lowest_ob_db_tx_gain_table_2p0[][5] = {
@@ -97,13 +100,13 @@ static const u32 ar9300Modes_lowest_ob_db_tx_gain_table_2p0[][5] = { 
	{0x0000a5f8, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec},

	{0x0000a5fc, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec},

	{0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},

	{0x00016048, 0x60001a61, 0x60001a61, 0x60001a61, 0x60001a61},

	{0x00016048, 0x62480001, 0x62480001, 0x62480001, 0x62480001},

	{0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},

	{0x00016444, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},

	{0x00016448, 0x60001a61, 0x60001a61, 0x60001a61, 0x60001a61},

	{0x00016448, 0x62480001, 0x62480001, 0x62480001, 0x62480001},

	{0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},

	{0x00016844, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},

	{0x00016848, 0x60001a61, 0x60001a61, 0x60001a61, 0x60001a61},

	{0x00016848, 0x62480001, 0x62480001, 0x62480001, 0x62480001},

	{0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},

};
@@ -129,7 +132,7 @@ static const u32 ar9300_2p0_radio_core[][2] = { 
	{0x00016040, 0x7f80fff8},

	{0x0001604c, 0x76d005b5},

	{0x00016050, 0x556cf031},

	{0x00016054, 0x43449440},

	{0x00016054, 0x13449440},

	{0x00016058, 0x0c51c92c},

	{0x0001605c, 0x3db7fffc},

	{0x00016060, 0xfffffffc},
@@ -152,12 +155,11 @@ static const u32 ar9300_2p0_radio_core[][2] = { 
	{0x00016100, 0x3fffbe01},

	{0x00016104, 0xfff80000},

	{0x00016108, 0x00080010},

	{0x00016140, 0x10804008},

	{0x00016144, 0x02084080},

	{0x00016148, 0x00000000},

	{0x00016280, 0x058a0001},

	{0x00016284, 0x3d840208},

	{0x00016288, 0x01a20408},

	{0x00016288, 0x05a20408},

	{0x0001628c, 0x00038c07},

	{0x00016290, 0x40000004},

	{0x00016294, 0x458aa14f},
@@ -190,7 +192,7 @@ static const u32 ar9300_2p0_radio_core[][2] = { 
	{0x00016440, 0x7f80fff8},

	{0x0001644c, 0x76d005b5},

	{0x00016450, 0x556cf031},

	{0x00016454, 0x43449440},

	{0x00016454, 0x13449440},

	{0x00016458, 0x0c51c92c},

	{0x0001645c, 0x3db7fffc},

	{0x00016460, 0xfffffffc},
@@ -199,7 +201,6 @@ static const u32 ar9300_2p0_radio_core[][2] = { 
	{0x00016500, 0x3fffbe01},

	{0x00016504, 0xfff80000},

	{0x00016508, 0x00080010},

	{0x00016540, 0x10804008},

	{0x00016544, 0x02084080},

	{0x00016548, 0x00000000},

	{0x00016780, 0x00000000},
@@ -231,7 +232,7 @@ static const u32 ar9300_2p0_radio_core[][2] = { 
	{0x00016840, 0x7f80fff8},

	{0x0001684c, 0x76d005b5},

	{0x00016850, 0x556cf031},

	{0x00016854, 0x43449440},

	{0x00016854, 0x13449440},

	{0x00016858, 0x0c51c92c},

	{0x0001685c, 0x3db7fffc},

	{0x00016860, 0xfffffffc},
@@ -240,7 +241,6 @@ static const u32 ar9300_2p0_radio_core[][2] = { 
	{0x00016900, 0x3fffbe01},

	{0x00016904, 0xfff80000},

	{0x00016908, 0x00080010},

	{0x00016940, 0x10804008},

	{0x00016944, 0x02084080},

	{0x00016948, 0x00000000},

	{0x00016b80, 0x00000000},
@@ -588,12 +588,12 @@ static const u32 ar9200_merlin_2p0_radio_core[][2] = { 


static const u32 ar9300_2p0_baseband_postamble[][5] = {

	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */

	{0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8005, 0xd00a800b},

	{0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8011, 0xd00a8011},

	{0x00009820, 0x206a022e, 0x206a022e, 0x206a012e, 0x206a012e},

	{0x00009824, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0},

	{0x00009828, 0x06903081, 0x06903081, 0x06903881, 0x06903881},

	{0x0000982c, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4},

	{0x00009830, 0x0000059c, 0x0000059c, 0x0000059c, 0x00000b9c},

	{0x00009830, 0x0000059c, 0x0000059c, 0x0000119c, 0x0000119c},

	{0x00009c00, 0x00000044, 0x000000c4, 0x000000c4, 0x00000044},

	{0x00009e00, 0x0372161e, 0x0372161e, 0x037216a0, 0x037216a0},

	{0x00009e04, 0x00802020, 0x00802020, 0x00802020, 0x00802020},
@@ -604,8 +604,8 @@ static const u32 ar9300_2p0_baseband_postamble[][5] = { 
	{0x00009e1c, 0x0001cf9c, 0x0001cf9c, 0x00021f9c, 0x00021f9c},

	{0x00009e20, 0x000003b5, 0x000003b5, 0x000003ce, 0x000003ce},

	{0x00009e2c, 0x0000001c, 0x0000001c, 0x00000021, 0x00000021},

	{0x00009e44, 0x02321e27, 0x02321e27, 0x02282324, 0x02282324},

	{0x00009e48, 0x5030201a, 0x5030201a, 0x50302010, 0x50302010},

	{0x00009e44, 0x02321e27, 0x02321e27, 0x02291e27, 0x02291e27},

	{0x00009e48, 0x5030201a, 0x5030201a, 0x50302012, 0x50302012},

	{0x00009fc8, 0x0003f000, 0x0003f000, 0x0001a000, 0x0001a000},

	{0x0000a204, 0x000037c0, 0x000037c4, 0x000037c4, 0x000037c0},

	{0x0000a208, 0x00000104, 0x00000104, 0x00000004, 0x00000004},
@@ -674,7 +674,7 @@ static const u32 ar9300_2p0_baseband_core[][2] = { 
	{0x00009d10, 0x01834061},

	{0x00009d14, 0x00c0040b},

	{0x00009d18, 0x00000000},

	{0x00009e08, 0x0038233c},

	{0x00009e08, 0x0038230c},

	{0x00009e24, 0x990bb515},

	{0x00009e28, 0x0c6f0000},

	{0x00009e30, 0x06336f77},
@@ -901,13 +901,13 @@ static const u32 ar9300Modes_high_power_tx_gain_table_2p0[][5] = { 
	{0x0000a5f8, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec},

	{0x0000a5fc, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec},

	{0x00016044, 0x056db2e6, 0x056db2e6, 0x056db2e6, 0x056db2e6},

	{0x00016048, 0xae481a61, 0xae481a61, 0xae481a61, 0xae481a61},

	{0x00016048, 0xae480001, 0xae480001, 0xae480001, 0xae480001},

	{0x00016068, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c},

	{0x00016444, 0x056db2e6, 0x056db2e6, 0x056db2e6, 0x056db2e6},

	{0x00016448, 0xae481a61, 0xae481a61, 0xae481a61, 0xae481a61},

	{0x00016448, 0xae480001, 0xae480001, 0xae480001, 0xae480001},

	{0x00016468, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c},

	{0x00016844, 0x056db2e6, 0x056db2e6, 0x056db2e6, 0x056db2e6},

	{0x00016848, 0xae481a61, 0xae481a61, 0xae481a61, 0xae481a61},

	{0x00016848, 0xae480001, 0xae480001, 0xae480001, 0xae480001},

	{0x00016868, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c},

};
@@ -979,13 +979,13 @@ static const u32 ar9300Modes_high_ob_db_tx_gain_table_2p0[][5] = { 
	{0x0000a5f8, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec},

	{0x0000a5fc, 0x7584ff56, 0x7584ff56, 0x56801eec, 0x56801eec},

	{0x00016044, 0x056db2e4, 0x056db2e4, 0x056db2e4, 0x056db2e4},

	{0x00016048, 0x8e481a61, 0x8e481a61, 0x8e481a61, 0x8e481a61},

	{0x00016048, 0x8e480001, 0x8e480001, 0x8e480001, 0x8e480001},

	{0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},

	{0x00016444, 0x056db2e4, 0x056db2e4, 0x056db2e4, 0x056db2e4},

	{0x00016448, 0x8e481a61, 0x8e481a61, 0x8e481a61, 0x8e481a61},

	{0x00016448, 0x8e480001, 0x8e480001, 0x8e480001, 0x8e480001},

	{0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},

	{0x00016844, 0x056db2e4, 0x056db2e4, 0x056db2e4, 0x056db2e4},

	{0x00016848, 0x8e481a61, 0x8e481a61, 0x8e481a61, 0x8e481a61},

	{0x00016848, 0x8e480001, 0x8e480001, 0x8e480001, 0x8e480001},

	{0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},

};
@@ -995,22 +995,22 @@ static const u32 ar9300Common_rx_gain_table_2p0[][2] = { 
	{0x0000a004, 0x00030002},

	{0x0000a008, 0x00050004},

	{0x0000a00c, 0x00810080},

	{0x0000a010, 0x01800082},

	{0x0000a014, 0x01820181},

	{0x0000a018, 0x01840183},

	{0x0000a01c, 0x01880185},

	{0x0000a020, 0x018a0189},

	{0x0000a024, 0x02850284},

	{0x0000a028, 0x02890288},

	{0x0000a02c, 0x028b028a},

	{0x0000a030, 0x028d028c},

	{0x0000a034, 0x02910290},

	{0x0000a038, 0x02930292},

	{0x0000a03c, 0x03910390},

	{0x0000a040, 0x03930392},

	{0x0000a044, 0x03950394},

	{0x0000a048, 0x00000396},

	{0x0000a04c, 0x00000000},

	{0x0000a010, 0x00830082},

	{0x0000a014, 0x01810180},

	{0x0000a018, 0x01830182},

	{0x0000a01c, 0x01850184},

	{0x0000a020, 0x01890188},

	{0x0000a024, 0x018b018a},

	{0x0000a028, 0x018d018c},

	{0x0000a02c, 0x01910190},

	{0x0000a030, 0x01930192},

	{0x0000a034, 0x01950194},

	{0x0000a038, 0x038a0196},

	{0x0000a03c, 0x038c038b},

	{0x0000a040, 0x0390038d},

	{0x0000a044, 0x03920391},

	{0x0000a048, 0x03940393},

	{0x0000a04c, 0x03960395},

	{0x0000a050, 0x00000000},

	{0x0000a054, 0x00000000},

	{0x0000a058, 0x00000000},
@@ -1023,14 +1023,14 @@ static const u32 ar9300Common_rx_gain_table_2p0[][2] = { 
	{0x0000a074, 0x00000000},

	{0x0000a078, 0x00000000},

	{0x0000a07c, 0x00000000},

	{0x0000a080, 0x28282828},

	{0x0000a084, 0x21212128},

	{0x0000a088, 0x21212121},

	{0x0000a08c, 0x1c1c1c21},

	{0x0000a090, 0x1c1c1c1c},

	{0x0000a094, 0x17171c1c},

	{0x0000a098, 0x02020212},

	{0x0000a09c, 0x02020202},

	{0x0000a080, 0x22222229},

	{0x0000a084, 0x1d1d1d1d},

	{0x0000a088, 0x1d1d1d1d},

	{0x0000a08c, 0x1d1d1d1d},

	{0x0000a090, 0x171d1d1d},

	{0x0000a094, 0x11111717},

	{0x0000a098, 0x00030311},

	{0x0000a09c, 0x00000000},

	{0x0000a0a0, 0x00000000},

	{0x0000a0a4, 0x00000000},

	{0x0000a0a8, 0x00000000},
@@ -1040,26 +1040,26 @@ static const u32 ar9300Common_rx_gain_table_2p0[][2] = { 
	{0x0000a0b8, 0x00000000},

	{0x0000a0bc, 0x00000000},

	{0x0000a0c0, 0x001f0000},

	{0x0000a0c4, 0x011f0100},

	{0x0000a0c8, 0x011d011e},

	{0x0000a0cc, 0x011b011c},

	{0x0000a0c4, 0x01000101},

	{0x0000a0c8, 0x011e011f},

	{0x0000a0cc, 0x011c011d},

	{0x0000a0d0, 0x02030204},

	{0x0000a0d4, 0x02010202},

	{0x0000a0d8, 0x021f0200},

	{0x0000a0dc, 0x021d021e},

	{0x0000a0e0, 0x03010302},

	{0x0000a0e4, 0x031f0300},

	{0x0000a0e8, 0x0402031e},

	{0x0000a0dc, 0x0302021e},

	{0x0000a0e0, 0x03000301},

	{0x0000a0e4, 0x031e031f},

	{0x0000a0e8, 0x0402031d},

	{0x0000a0ec, 0x04000401},

	{0x0000a0f0, 0x041e041f},

	{0x0000a0f4, 0x05010502},

	{0x0000a0f8, 0x051f0500},

	{0x0000a0fc, 0x0602051e},

	{0x0000a100, 0x06000601},

	{0x0000a104, 0x061e061f},

	{0x0000a108, 0x0703061d},

	{0x0000a10c, 0x07010702},

	{0x0000a110, 0x00000700},

	{0x0000a0f4, 0x0502041d},

	{0x0000a0f8, 0x05000501},

	{0x0000a0fc, 0x051e051f},

	{0x0000a100, 0x06010602},

	{0x0000a104, 0x061f0600},

	{0x0000a108, 0x061d061e},

	{0x0000a10c, 0x07020703},

	{0x0000a110, 0x07000701},

	{0x0000a114, 0x00000000},

	{0x0000a118, 0x00000000},

	{0x0000a11c, 0x00000000},
@@ -1072,26 +1072,26 @@ static const u32 ar9300Common_rx_gain_table_2p0[][2] = { 
	{0x0000a138, 0x00000000},

	{0x0000a13c, 0x00000000},

	{0x0000a140, 0x001f0000},

	{0x0000a144, 0x011f0100},

	{0x0000a148, 0x011d011e},

	{0x0000a14c, 0x011b011c},

	{0x0000a144, 0x01000101},

	{0x0000a148, 0x011e011f},

	{0x0000a14c, 0x011c011d},

	{0x0000a150, 0x02030204},

	{0x0000a154, 0x02010202},

	{0x0000a158, 0x021f0200},

	{0x0000a15c, 0x021d021e},

	{0x0000a160, 0x03010302},

	{0x0000a164, 0x031f0300},

	{0x0000a168, 0x0402031e},

	{0x0000a15c, 0x0302021e},

	{0x0000a160, 0x03000301},

	{0x0000a164, 0x031e031f},

	{0x0000a168, 0x0402031d},

	{0x0000a16c, 0x04000401},

	{0x0000a170, 0x041e041f},

	{0x0000a174, 0x05010502},

	{0x0000a178, 0x051f0500},

	{0x0000a17c, 0x0602051e},

	{0x0000a180, 0x06000601},

	{0x0000a184, 0x061e061f},

	{0x0000a188, 0x0703061d},

	{0x0000a18c, 0x07010702},

	{0x0000a190, 0x00000700},

	{0x0000a174, 0x0502041d},

	{0x0000a178, 0x05000501},

	{0x0000a17c, 0x051e051f},

	{0x0000a180, 0x06010602},

	{0x0000a184, 0x061f0600},

	{0x0000a188, 0x061d061e},

	{0x0000a18c, 0x07020703},

	{0x0000a190, 0x07000701},

	{0x0000a194, 0x00000000},

	{0x0000a198, 0x00000000},

	{0x0000a19c, 0x00000000},
@@ -1317,13 +1317,13 @@ static const u32 ar9300Modes_low_ob_db_tx_gain_table_2p0[][5] = { 
	{0x0000a5f8, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec},

	{0x0000a5fc, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec},

	{0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},

	{0x00016048, 0x64001a61, 0x64001a61, 0x64001a61, 0x64001a61},

	{0x00016048, 0x64000001, 0x64000001, 0x64000001, 0x64000001},

	{0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},

	{0x00016444, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},

	{0x00016448, 0x64001a61, 0x64001a61, 0x64001a61, 0x64001a61},

	{0x00016448, 0x64000001, 0x64000001, 0x64000001, 0x64000001},

	{0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},

	{0x00016844, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},

	{0x00016848, 0x64001a61, 0x64001a61, 0x64001a61, 0x64001a61},

	{0x00016848, 0x64000001, 0x64000001, 0x64000001, 0x64000001},

	{0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},

};
@@ -1497,22 +1497,22 @@ static const u32 ar9300Common_wo_xlna_rx_gain_table_2p0[][2] = { 
	{0x0000a004, 0x00030002},

	{0x0000a008, 0x00050004},

	{0x0000a00c, 0x00810080},

	{0x0000a010, 0x01800082},

	{0x0000a014, 0x01820181},

	{0x0000a018, 0x01840183},

	{0x0000a01c, 0x01880185},

	{0x0000a020, 0x018a0189},

	{0x0000a024, 0x02850284},

	{0x0000a028, 0x02890288},

	{0x0000a02c, 0x03850384},

	{0x0000a030, 0x03890388},

	{0x0000a034, 0x038b038a},

	{0x0000a038, 0x038d038c},

	{0x0000a03c, 0x03910390},

	{0x0000a040, 0x03930392},

	{0x0000a044, 0x03950394},

	{0x0000a048, 0x00000396},

	{0x0000a04c, 0x00000000},

	{0x0000a010, 0x00830082},

	{0x0000a014, 0x01810180},

	{0x0000a018, 0x01830182},

	{0x0000a01c, 0x01850184},

	{0x0000a020, 0x01890188},

	{0x0000a024, 0x018b018a},

	{0x0000a028, 0x018d018c},

	{0x0000a02c, 0x03820190},

	{0x0000a030, 0x03840383},

	{0x0000a034, 0x03880385},

	{0x0000a038, 0x038a0389},

	{0x0000a03c, 0x038c038b},

	{0x0000a040, 0x0390038d},

	{0x0000a044, 0x03920391},

	{0x0000a048, 0x03940393},

	{0x0000a04c, 0x03960395},

	{0x0000a050, 0x00000000},

	{0x0000a054, 0x00000000},

	{0x0000a058, 0x00000000},
@@ -1525,15 +1525,15 @@ static const u32 ar9300Common_wo_xlna_rx_gain_table_2p0[][2] = { 
	{0x0000a074, 0x00000000},

	{0x0000a078, 0x00000000},

	{0x0000a07c, 0x00000000},

	{0x0000a080, 0x28282828},

	{0x0000a084, 0x28282828},

	{0x0000a088, 0x28282828},

	{0x0000a08c, 0x28282828},

	{0x0000a090, 0x28282828},

	{0x0000a094, 0x21212128},

	{0x0000a098, 0x171c1c1c},

	{0x0000a09c, 0x02020212},

	{0x0000a0a0, 0x00000202},

	{0x0000a080, 0x29292929},

	{0x0000a084, 0x29292929},

	{0x0000a088, 0x29292929},

	{0x0000a08c, 0x29292929},

	{0x0000a090, 0x22292929},

	{0x0000a094, 0x1d1d2222},

	{0x0000a098, 0x0c111117},

	{0x0000a09c, 0x00030303},

	{0x0000a0a0, 0x00000000},

	{0x0000a0a4, 0x00000000},

	{0x0000a0a8, 0x00000000},

	{0x0000a0ac, 0x00000000},
@@ -1542,26 +1542,26 @@ static const u32 ar9300Common_wo_xlna_rx_gain_table_2p0[][2] = { 
	{0x0000a0b8, 0x00000000},

	{0x0000a0bc, 0x00000000},

	{0x0000a0c0, 0x001f0000},

	{0x0000a0c4, 0x011f0100},

	{0x0000a0c8, 0x011d011e},

	{0x0000a0cc, 0x011b011c},

	{0x0000a0c4, 0x01000101},

	{0x0000a0c8, 0x011e011f},

	{0x0000a0cc, 0x011c011d},

	{0x0000a0d0, 0x02030204},

	{0x0000a0d4, 0x02010202},

	{0x0000a0d8, 0x021f0200},

	{0x0000a0dc, 0x021d021e},

	{0x0000a0e0, 0x03010302},

	{0x0000a0e4, 0x031f0300},

	{0x0000a0e8, 0x0402031e},

	{0x0000a0dc, 0x0302021e},

	{0x0000a0e0, 0x03000301},

	{0x0000a0e4, 0x031e031f},

	{0x0000a0e8, 0x0402031d},

	{0x0000a0ec, 0x04000401},

	{0x0000a0f0, 0x041e041f},

	{0x0000a0f4, 0x05010502},

	{0x0000a0f8, 0x051f0500},

	{0x0000a0fc, 0x0602051e},

	{0x0000a100, 0x06000601},

	{0x0000a104, 0x061e061f},

	{0x0000a108, 0x0703061d},

	{0x0000a10c, 0x07010702},

	{0x0000a110, 0x00000700},

	{0x0000a0f4, 0x0502041d},

	{0x0000a0f8, 0x05000501},

	{0x0000a0fc, 0x051e051f},

	{0x0000a100, 0x06010602},

	{0x0000a104, 0x061f0600},

	{0x0000a108, 0x061d061e},

	{0x0000a10c, 0x07020703},

	{0x0000a110, 0x07000701},

	{0x0000a114, 0x00000000},

	{0x0000a118, 0x00000000},

	{0x0000a11c, 0x00000000},
@@ -1574,26 +1574,26 @@ static const u32 ar9300Common_wo_xlna_rx_gain_table_2p0[][2] = { 
	{0x0000a138, 0x00000000},

	{0x0000a13c, 0x00000000},

	{0x0000a140, 0x001f0000},

	{0x0000a144, 0x011f0100},

	{0x0000a148, 0x011d011e},

	{0x0000a14c, 0x011b011c},

	{0x0000a144, 0x01000101},

	{0x0000a148, 0x011e011f},

	{0x0000a14c, 0x011c011d},

	{0x0000a150, 0x02030204},

	{0x0000a154, 0x02010202},

	{0x0000a158, 0x021f0200},

	{0x0000a15c, 0x021d021e},

	{0x0000a160, 0x03010302},

	{0x0000a164, 0x031f0300},

	{0x0000a168, 0x0402031e},

	{0x0000a15c, 0x0302021e},

	{0x0000a160, 0x03000301},

	{0x0000a164, 0x031e031f},

	{0x0000a168, 0x0402031d},

	{0x0000a16c, 0x04000401},

	{0x0000a170, 0x041e041f},

	{0x0000a174, 0x05010502},

	{0x0000a178, 0x051f0500},

	{0x0000a17c, 0x0602051e},

	{0x0000a180, 0x06000601},

	{0x0000a184, 0x061e061f},

	{0x0000a188, 0x0703061d},

	{0x0000a18c, 0x07010702},

	{0x0000a190, 0x00000700},

	{0x0000a174, 0x0502041d},

	{0x0000a178, 0x05000501},

	{0x0000a17c, 0x051e051f},

	{0x0000a180, 0x06010602},

	{0x0000a184, 0x061f0600},

	{0x0000a188, 0x061d061e},

	{0x0000a18c, 0x07020703},

	{0x0000a190, 0x07000701},

	{0x0000a194, 0x00000000},

	{0x0000a198, 0x00000000},

	{0x0000a19c, 0x00000000},
@@ -1620,7 +1620,7 @@ static const u32 ar9300Common_wo_xlna_rx_gain_table_2p0[][2] = { 
	{0x0000a1f0, 0x00000396},

	{0x0000a1f4, 0x00000396},

	{0x0000a1f8, 0x00000396},

	{0x0000a1fc, 0x00000296},

	{0x0000a1fc, 0x00000196},

	{0x0000b000, 0x00010000},

	{0x0000b004, 0x00030002},

	{0x0000b008, 0x00050004},