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Commit 6fc6a0f0 authored by Shyam Kumar Thella's avatar Shyam Kumar Thella
Browse files

power: supply: qbg: Fix compilation issues 



Fix different compilation issues found in QBG driver.

Change-Id: I8ac84e8bffb0c875dac34ea5aa82988b3a05e24f
Signed-off-by: default avatarShyam Kumar Thella <sthella@codeaurora.org>
parent bef508ec

drivers/power/supply/qcom/qti-qbg.c

+10 −11
Original line number Diff line number Diff line
@@ -215,7 +215,7 @@ static int qbg_get_fifo_count(struct qti_qbg *chip, u32 *fifo_count) 
	u8 val[2];



	rc = qbg_sdam_read(chip,

		QBG_SDAM_DATA_START_OFFSET(SDAM_CTRL0) + QBG_SDAM_FIFO_COUNT_OFFSET,

		QBG_SDAM_DATA_START_OFFSET(chip, SDAM_CTRL0) + QBG_SDAM_FIFO_COUNT_OFFSET,

		val, 2);

	if (rc < 0) {

		pr_err("Failed to read QBG SDAM, rc=%d\n", rc);
@@ -341,7 +341,6 @@ static int qbg_decode_fifo_data(struct fifo_data fifo, unsigned int *vbat1, 
static int get_rtc_time(struct qti_qbg *chip, unsigned long *rtc_time)

{

	struct rtc_time tm;

	struct rtc_device *rtc;

	int rc;



	if (!chip->rtc) {
@@ -478,7 +477,7 @@ static int qbg_clear_fifo_data(struct qti_qbg *chip) 
	u8 val[2] = {0, 0};



	rc = qbg_sdam_write(chip,

		QBG_SDAM_DATA_START_OFFSET(SDAM_CTRL0) + QBG_SDAM_FIFO_COUNT_OFFSET,

		QBG_SDAM_DATA_START_OFFSET(chip, SDAM_CTRL0) + QBG_SDAM_FIFO_COUNT_OFFSET,

		val, 2);

	if (rc < 0) {

		pr_err("Failed to clear QBG FIFO Count, rc=%d\n", rc);
@@ -488,7 +487,7 @@ static int qbg_clear_fifo_data(struct qti_qbg *chip) 
	for (i = 0; i < 10; i++) {

		val[0] = 0;

		rc = qbg_sdam_write(chip,

			QBG_SDAM_DATA_START_OFFSET(SDAM_CTRL0) + QBG_SDAM_INT_TEST_VAL,

			QBG_SDAM_DATA_START_OFFSET(chip, SDAM_CTRL0) + QBG_SDAM_INT_TEST_VAL,

			val, 1);

		if (rc < 0) {

			pr_err("Failed to SDAM0 test val to 0, rc=%d\n", rc);
@@ -497,7 +496,7 @@ static int qbg_clear_fifo_data(struct qti_qbg *chip) 


		/* Handshake with PBS to access FIFO data */

		rc = qbg_sdam_read(chip,

			QBG_SDAM_DATA_START_OFFSET(SDAM_CTRL0) + QBG_SDAM_INT_TEST_VAL,

			QBG_SDAM_DATA_START_OFFSET(chip, SDAM_CTRL0) + QBG_SDAM_INT_TEST_VAL,

			val, 1);

		if (rc < 0) {

			pr_err("Failed to read QBG SDAM, rc=%d\n", rc);
@@ -513,7 +512,7 @@ static int qbg_clear_fifo_data(struct qti_qbg *chip) 
	val[0] = QBG_SDAM_START_OFFSET;

	val[1] = 0x0;

	rc = qbg_sdam_write(chip,

		QBG_SDAM_DATA_START_OFFSET(SDAM_DATA0) + QBG_SDAM_DATA_PUSH_COUNTER_OFFSET,

		QBG_SDAM_DATA_START_OFFSET(chip, SDAM_DATA0) + QBG_SDAM_DATA_PUSH_COUNTER_OFFSET,

		val, 2);

	if (rc < 0) {

		pr_err("Failed to configure QBG data push counter, rc=%d\n", rc);
@@ -521,7 +520,7 @@ static int qbg_clear_fifo_data(struct qti_qbg *chip) 
	}

	val[0] = 0x0;

	rc = qbg_sdam_write(chip,

		QBG_SDAM_DATA_START_OFFSET(SDAM_CTRL0) + QBG_SDAM_PBS_STATUS_OFFSET,

		QBG_SDAM_DATA_START_OFFSET(chip, SDAM_CTRL0) + QBG_SDAM_PBS_STATUS_OFFSET,

		val, 1);

	if (rc < 0) {

		pr_err("Failed to set QBG PBS status, rc=%d\n", rc);
@@ -538,7 +537,7 @@ static int qbg_init_sdam(struct qti_qbg *chip) 


	val[0] = 0x80;

	rc = qbg_sdam_write(chip,

		QBG_SDAM_DATA_START_OFFSET(SDAM_CTRL0) + QBG_SDAM_INT_TEST1, val, 1);

		QBG_SDAM_DATA_START_OFFSET(chip, SDAM_CTRL0) + QBG_SDAM_INT_TEST1, val, 1);

	if (rc < 0) {

		pr_err("Failed to write QBG SDAM, rc=%d\n", rc);

		return rc;
@@ -546,7 +545,7 @@ static int qbg_init_sdam(struct qti_qbg *chip) 


	val[0] = 0;

	rc = qbg_sdam_read(chip,

		QBG_SDAM_DATA_START_OFFSET(SDAM_CTRL0) +  QBG_SDAM_INT_TEST_VAL,

		QBG_SDAM_DATA_START_OFFSET(chip, SDAM_CTRL0) +  QBG_SDAM_INT_TEST_VAL,

		val, 1);

	if (rc < 0) {

		pr_err("Faiiled to read QBG SDAM, rc=%d\n", rc);
@@ -975,7 +974,7 @@ static int qbg_get_pon_reading(struct qti_qbg *chip, unsigned int *ocv, 


static int qbg_determine_pon_soc(struct qti_qbg *chip)

{

	int rc;

	int rc, batt_temp;

	union power_supply_propval prop = {0, };

	unsigned long rtc_sec, time_diff = 0;

	unsigned int pon_ocv;
@@ -1556,7 +1555,7 @@ static int qbg_parse_sdam_dt(struct qti_qbg *chip, struct device_node *node) 
static int qbg_parse_dt(struct qti_qbg *chip)

{

	struct device_node *node = chip->dev->of_node;

	int rc = 0, i;

	int rc = 0;

	u32 val;



	rc = qbg_parse_sdam_dt(chip, node);