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Commit 6fb924dc authored by Zhangfei Gao's avatar Zhangfei Gao Committed by Stephen Boyd
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clk: hi6220: Add RTC clock for pl031 



Adds clk support for the pl031 RTC on hi6220

Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Wei Xu <xuwei5@hisilicon.com>
Cc: Guodong Xu <guodong.xu@linaro.org>
Signed-off-by: default avatarZhangfei Gao <zhangfei.gao@linaro.org>
[jstultz: Forward ported, tweaked commit description]
Signed-off-by: default avatarJohn Stultz <john.stultz@linaro.org>
Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
parent 1a695a90

drivers/clk/hisilicon/clk-hi6220.c

+2 −0
Original line number Diff line number Diff line
@@ -68,6 +68,8 @@ static struct hisi_gate_clock hi6220_separated_gate_clks_ao[] __initdata = { 
	{ HI6220_TIMER7_PCLK, "timer7_pclk", "clk_tcxo", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x630, 22, 0, },

	{ HI6220_TIMER8_PCLK, "timer8_pclk", "clk_tcxo", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x630, 23, 0, },

	{ HI6220_UART0_PCLK,  "uart0_pclk",  "clk_tcxo", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x630, 24, 0, },

	{ HI6220_RTC0_PCLK,   "rtc0_pclk",   "clk_tcxo", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x630, 25, 0, },

	{ HI6220_RTC1_PCLK,   "rtc1_pclk",   "clk_tcxo", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x630, 26, 0, },

};



static void __init hi6220_clk_ao_init(struct device_node *np)

include/dt-bindings/clock/hi6220-clock.h

+3 −2
Original line number Diff line number Diff line
@@ -55,8 +55,9 @@ 
#define HI6220_TIMER7_PCLK	34

#define HI6220_TIMER8_PCLK	35

#define HI6220_UART0_PCLK	36



#define HI6220_AO_NR_CLKS	37

#define HI6220_RTC0_PCLK	37

#define HI6220_RTC1_PCLK	38

#define HI6220_AO_NR_CLKS	39



/* clk in Hi6220 systrl */

/* gate clock */