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Commit 6f88fb8a authored by Peter De Schrijver's avatar Peter De Schrijver Committed by Stephen Warren
Browse files

clocksource: tegra: move to of_clk_get 



The new clockframework introduced DT IDs for each clock. To be able to remove
the device registrations, this driver needs to be updated to use the DT IDs.
Note that the actual removal of the clk_register_clkdev() calls will be done
in a later series.

Signed-off-by: default avatarPeter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
parent 1b14f3a5

arch/arm/boot/dts/tegra20.dtsi

+2 −0
Original line number Diff line number Diff line
@@ -144,6 +144,7 @@ 
			      0 1 0x04

			      0 41 0x04

			      0 42 0x04>;

		clocks = <&tegra_car 5>;

	};



	tegra_car: clock {
@@ -303,6 +304,7 @@ 
		compatible = "nvidia,tegra20-rtc";

		reg = <0x7000e000 0x100>;

		interrupts = <0 2 0x04>;

		clocks = <&tegra_car 4>;

	};



	i2c@7000c000 {

arch/arm/boot/dts/tegra30.dtsi

+2 −0
Original line number Diff line number Diff line
@@ -147,6 +147,7 @@ 
			      0 42 0x04

			      0 121 0x04

			      0 122 0x04>;

		clocks = <&tegra_car 5>;

	};



	tegra_car: clock {
@@ -290,6 +291,7 @@ 
		compatible = "nvidia,tegra30-rtc", "nvidia,tegra20-rtc";

		reg = <0x7000e000 0x100>;

		interrupts = <0 2 0x04>;

		clocks = <&tegra_car 4>;

	};



	i2c@7000c000 {

drivers/clocksource/tegra20_timer.c

+2 −2
Original line number Diff line number Diff line
@@ -189,7 +189,7 @@ static void __init tegra20_init_timer(void) 
		BUG();

	}



	clk = clk_get_sys("timer", NULL);

	clk = of_clk_get(np, 0);

	if (IS_ERR(clk)) {

		pr_warn("Unable to get timer clock. Assuming 12Mhz input clock.\n");

		rate = 12000000;
@@ -216,7 +216,7 @@ static void __init tegra20_init_timer(void) 
	 * rtc registers are used by read_persistent_clock, keep the rtc clock

	 * enabled

	 */

	clk = clk_get_sys("rtc-tegra", NULL);

	clk = of_clk_get(np, 0);

	if (IS_ERR(clk))

		pr_warn("Unable to get rtc-tegra clock\n");

	else