Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Unverified Commit 6f002c57 authored by Icenowy Zheng's avatar Icenowy Zheng Committed by Maxime Ripard
Browse files

ARM: dts: sun8i: s3: add devicetree for Lichee zero plus w/ S3 



Lichee zero plus is a core board made by Sipeed, which includes on-board
TF slot or SMT SD NAND, and optional SPI NOR or eMMC, a UART debug
header, a microUSB slot and a gold finger connector for expansion. It
can use either Sochip S3 or Allwinner S3L SoC.

Add the basic device tree for the core board, w/o optional onboard
storage, and with S3 SoC.

Signed-off-by: default avatarIcenowy Zheng <icenowy@aosc.io>
Signed-off-by: default avatarMaxime Ripard <maxime.ripard@bootlin.com>
parent 11d1bdea

arch/arm/boot/dts/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -1114,6 +1114,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \ 
	sun8i-r16-nintendo-super-nes-classic.dtb \

	sun8i-r16-parrot.dtb \

	sun8i-r40-bananapi-m2-ultra.dtb \

	sun8i-s3-lichee-zero-plus.dtb \

	sun8i-t3-cqa3t-bv3.dtb \

	sun8i-v3s-licheepi-zero.dtb \

	sun8i-v3s-licheepi-zero-dock.dtb \

arch/arm/boot/dts/sun8i-s3-lichee-zero-plus.dts

0 → 100644
+53 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)

/*

 * Copyright (C) 2019 Icenowy Zheng <icenowy@aosc.io>

 */



/dts-v1/;

#include "sun8i-v3.dtsi"



#include <dt-bindings/gpio/gpio.h>



/ {

	model = "Sipeed Lichee Zero Plus";

	compatible = "sipeed,lichee-zero-plus", "sochip,s3",

		     "allwinner,sun8i-v3";



	aliases {

		serial0 = &uart0;

	};



	chosen {

		stdout-path = "serial0:115200n8";

	};



	reg_vcc3v3: vcc3v3 {

		compatible = "regulator-fixed";

		regulator-name = "vcc3v3";

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;

	};

};



&mmc0 {

	broken-cd;

	bus-width = <4>;

	vmmc-supply = <&reg_vcc3v3>;

	status = "okay";

};



&uart0 {

	pinctrl-0 = <&uart0_pb_pins>;

	pinctrl-names = "default";

	status = "okay";

};



&usb_otg {

	dr_mode = "peripheral";

	status = "okay";

};



&usbphy {

	usb0_id_det-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;

	status = "okay";

};