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Commit 6efecd8c authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'intel' 



Jeff Kirsher says:

====================
This series contains updates to e1000e only.  All the updates come
from Bruce Allan and most of the patch fix or enable features on
i217/i218.  Most notably is patch 03 "e1000e: add support for IEEE-1588
PTP", which is v2 of the patch based on feedback from Stephen Hemminger.

Also patch 04 "e1000e: enable ECC on I217/I218 to catch packet buffer
memory errors" should be queued up for stable (as well as net) trees, but
the patch does not apply cleanly to either of those trees currently.
So I will work with Bruce to provide a version of the patch which will
apply cleanly to net (and stable) and we can queue it up at that point
for stable 3.5 tree.

The remaining patches are general cleanups of the code.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 031554ea 70806a7f

drivers/net/ethernet/intel/Kconfig

+1 −0
Original line number Original line Diff line number Diff line
@@ -74,6 +74,7 @@ config E1000E 
	tristate "Intel(R) PRO/1000 PCI-Express Gigabit Ethernet support"

	tristate "Intel(R) PRO/1000 PCI-Express Gigabit Ethernet support"

	depends on PCI && (!SPARC32 || BROKEN)

	depends on PCI && (!SPARC32 || BROKEN)

	select CRC32

	select CRC32

	select PTP_1588_CLOCK

	---help---

	---help---

	  This driver supports the PCI-Express Intel(R) PRO/1000 gigabit

	  This driver supports the PCI-Express Intel(R) PRO/1000 gigabit

	  ethernet family of adapters. For PCI or PCI-X e1000 adapters,

	  ethernet family of adapters. For PCI or PCI-X e1000 adapters,

drivers/net/ethernet/intel/e1000e/80003es2lan.c

+14 −10
Original line number Original line Diff line number Diff line 
/*******************************************************************************

/*******************************************************************************





  Intel PRO/1000 Linux driver

  Intel PRO/1000 Linux driver

  Copyright(c) 1999 - 2012 Intel Corporation.

  Copyright(c) 1999 - 2013 Intel Corporation.





  This program is free software; you can redistribute it and/or modify it

  This program is free software; you can redistribute it and/or modify it

  under the terms and conditions of the GNU General Public License,

  under the terms and conditions of the GNU General Public License,
@@ -111,7 +111,6 @@ static void e1000_initialize_hw_bits_80003es2lan(struct e1000_hw *hw); 
static void e1000_clear_hw_cntrs_80003es2lan(struct e1000_hw *hw);

static void e1000_clear_hw_cntrs_80003es2lan(struct e1000_hw *hw);

static s32 e1000_cfg_kmrn_1000_80003es2lan(struct e1000_hw *hw);

static s32 e1000_cfg_kmrn_1000_80003es2lan(struct e1000_hw *hw);

static s32 e1000_cfg_kmrn_10_100_80003es2lan(struct e1000_hw *hw, u16 duplex);

static s32 e1000_cfg_kmrn_10_100_80003es2lan(struct e1000_hw *hw, u16 duplex);

static s32 e1000_cfg_on_link_up_80003es2lan(struct e1000_hw *hw);

static s32 e1000_read_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset,

static s32 e1000_read_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset,

					   u16 *data);

					   u16 *data);

static s32 e1000_write_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset,

static s32 e1000_write_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset,
@@ -696,7 +695,7 @@ static s32 e1000_phy_force_speed_duplex_80003es2lan(struct e1000_hw *hw) 
static s32 e1000_get_cable_length_80003es2lan(struct e1000_hw *hw)

static s32 e1000_get_cable_length_80003es2lan(struct e1000_hw *hw)

{

{

	struct e1000_phy_info *phy = &hw->phy;

	struct e1000_phy_info *phy = &hw->phy;

	s32 ret_val = 0;

	s32 ret_val;

	u16 phy_data, index;

	u16 phy_data, index;





	ret_val = e1e_rphy(hw, GG82563_PHY_DSP_DISTANCE, &phy_data);

	ret_val = e1e_rphy(hw, GG82563_PHY_DSP_DISTANCE, &phy_data);
@@ -774,6 +773,9 @@ static s32 e1000_reset_hw_80003es2lan(struct e1000_hw *hw) 
	ctrl = er32(CTRL);

	ctrl = er32(CTRL);





	ret_val = e1000_acquire_phy_80003es2lan(hw);

	ret_val = e1000_acquire_phy_80003es2lan(hw);

	if (ret_val)

		return ret_val;



	e_dbg("Issuing a global reset to MAC\n");

	e_dbg("Issuing a global reset to MAC\n");

	ew32(CTRL, ctrl | E1000_CTRL_RST);

	ew32(CTRL, ctrl | E1000_CTRL_RST);

	e1000_release_phy_80003es2lan(hw);

	e1000_release_phy_80003es2lan(hw);
@@ -833,6 +835,8 @@ static s32 e1000_init_hw_80003es2lan(struct e1000_hw *hw) 




	/* Setup link and flow control */

	/* Setup link and flow control */

	ret_val = mac->ops.setup_link(hw);

	ret_val = mac->ops.setup_link(hw);

	if (ret_val)

		return ret_val;





	/* Disable IBIST slave mode (far-end loopback) */

	/* Disable IBIST slave mode (far-end loopback) */

	e1000_read_kmrn_reg_80003es2lan(hw, E1000_KMRNCTRLSTA_INBAND_PARAM,

	e1000_read_kmrn_reg_80003es2lan(hw, E1000_KMRNCTRLSTA_INBAND_PARAM,
@@ -1272,7 +1276,7 @@ static s32 e1000_read_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset, 
					   u16 *data)

					   u16 *data)

{

{

	u32 kmrnctrlsta;

	u32 kmrnctrlsta;

	s32 ret_val = 0;

	s32 ret_val;





	ret_val = e1000_acquire_mac_csr_80003es2lan(hw);

	ret_val = e1000_acquire_mac_csr_80003es2lan(hw);

	if (ret_val)

	if (ret_val)
@@ -1307,7 +1311,7 @@ static s32 e1000_write_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset, 
					    u16 data)

					    u16 data)

{

{

	u32 kmrnctrlsta;

	u32 kmrnctrlsta;

	s32 ret_val = 0;

	s32 ret_val;





	ret_val = e1000_acquire_mac_csr_80003es2lan(hw);

	ret_val = e1000_acquire_mac_csr_80003es2lan(hw);

	if (ret_val)

	if (ret_val)
@@ -1331,7 +1335,7 @@ static s32 e1000_write_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset, 
 **/

 **/

static s32 e1000_read_mac_addr_80003es2lan(struct e1000_hw *hw)

static s32 e1000_read_mac_addr_80003es2lan(struct e1000_hw *hw)

{

{

	s32 ret_val = 0;

	s32 ret_val;





	/* If there's an alternate MAC address place it in RAR0

	/* If there's an alternate MAC address place it in RAR0

	 * so that it will override the Si installed default perm

	 * so that it will override the Si installed default perm

drivers/net/ethernet/intel/e1000e/82571.c

+9 −9
Original line number Original line Diff line number Diff line 
/*******************************************************************************

/*******************************************************************************





  Intel PRO/1000 Linux driver

  Intel PRO/1000 Linux driver

  Copyright(c) 1999 - 2012 Intel Corporation.

  Copyright(c) 1999 - 2013 Intel Corporation.





  This program is free software; you can redistribute it and/or modify it

  This program is free software; you can redistribute it and/or modify it

  under the terms and conditions of the GNU General Public License,

  under the terms and conditions of the GNU General Public License,
@@ -67,9 +67,7 @@ static s32 e1000_write_nvm_eewr_82571(struct e1000_hw *hw, u16 offset, 
				      u16 words, u16 *data);

				      u16 words, u16 *data);

static s32 e1000_fix_nvm_checksum_82571(struct e1000_hw *hw);

static s32 e1000_fix_nvm_checksum_82571(struct e1000_hw *hw);

static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw);

static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw);

static s32 e1000_setup_link_82571(struct e1000_hw *hw);

static void e1000_clear_hw_cntrs_82571(struct e1000_hw *hw);

static void e1000_clear_hw_cntrs_82571(struct e1000_hw *hw);

static void e1000_clear_vfta_82571(struct e1000_hw *hw);

static bool e1000_check_mng_mode_82574(struct e1000_hw *hw);

static bool e1000_check_mng_mode_82574(struct e1000_hw *hw);

static s32 e1000_led_on_82574(struct e1000_hw *hw);

static s32 e1000_led_on_82574(struct e1000_hw *hw);

static void e1000_put_hw_semaphore_82571(struct e1000_hw *hw);

static void e1000_put_hw_semaphore_82571(struct e1000_hw *hw);
@@ -556,16 +554,14 @@ static s32 e1000_get_hw_semaphore_82573(struct e1000_hw *hw) 
	s32 i = 0;

	s32 i = 0;





	extcnf_ctrl = er32(EXTCNF_CTRL);

	extcnf_ctrl = er32(EXTCNF_CTRL);

	extcnf_ctrl |= E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP;

	do {

	do {

		extcnf_ctrl |= E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP;

		ew32(EXTCNF_CTRL, extcnf_ctrl);

		ew32(EXTCNF_CTRL, extcnf_ctrl);

		extcnf_ctrl = er32(EXTCNF_CTRL);

		extcnf_ctrl = er32(EXTCNF_CTRL);





		if (extcnf_ctrl & E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP)

		if (extcnf_ctrl & E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP)

			break;

			break;





		extcnf_ctrl |= E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP;



		usleep_range(2000, 4000);

		usleep_range(2000, 4000);

		i++;

		i++;

	} while (i < MDIO_OWNERSHIP_TIMEOUT);

	} while (i < MDIO_OWNERSHIP_TIMEOUT);
@@ -937,6 +933,8 @@ static s32 e1000_set_d0_lplu_state_82571(struct e1000_hw *hw, bool active) 




		/* When LPLU is enabled, we should disable SmartSpeed */

		/* When LPLU is enabled, we should disable SmartSpeed */

		ret_val = e1e_rphy(hw, IGP01E1000_PHY_PORT_CONFIG, &data);

		ret_val = e1e_rphy(hw, IGP01E1000_PHY_PORT_CONFIG, &data);

		if (ret_val)

			return ret_val;

		data &= ~IGP01E1000_PSCFR_SMART_SPEED;

		data &= ~IGP01E1000_PSCFR_SMART_SPEED;

		ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CONFIG, data);

		ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CONFIG, data);

		if (ret_val)

		if (ret_val)
@@ -1399,7 +1397,7 @@ bool e1000_check_phy_82574(struct e1000_hw *hw) 
{

{

	u16 status_1kbt = 0;

	u16 status_1kbt = 0;

	u16 receive_errors = 0;

	u16 receive_errors = 0;

	s32 ret_val = 0;

	s32 ret_val;





	/* Read PHY Receive Error counter first, if its is max - all F's then

	/* Read PHY Receive Error counter first, if its is max - all F's then

	 * read the Base1000T status register If both are max then PHY is hung.

	 * read the Base1000T status register If both are max then PHY is hung.
@@ -1544,7 +1542,7 @@ static s32 e1000_check_for_serdes_link_82571(struct e1000_hw *hw) 




	ctrl = er32(CTRL);

	ctrl = er32(CTRL);

	status = er32(STATUS);

	status = er32(STATUS);

	rxcw = er32(RXCW);

	er32(RXCW);

	/* SYNCH bit and IV bit are sticky */

	/* SYNCH bit and IV bit are sticky */

	udelay(10);

	udelay(10);

	rxcw = er32(RXCW);

	rxcw = er32(RXCW);
@@ -1799,6 +1797,8 @@ static s32 e1000_fix_nvm_checksum_82571(struct e1000_hw *hw) 
			if (ret_val)

			if (ret_val)

				return ret_val;

				return ret_val;

			ret_val = e1000e_update_nvm_checksum(hw);

			ret_val = e1000e_update_nvm_checksum(hw);

			if (ret_val)

				return ret_val;

		}

		}

	}

	}
@@ -1812,7 +1812,7 @@ static s32 e1000_fix_nvm_checksum_82571(struct e1000_hw *hw) 
static s32 e1000_read_mac_addr_82571(struct e1000_hw *hw)

static s32 e1000_read_mac_addr_82571(struct e1000_hw *hw)

{

{

	if (hw->mac.type == e1000_82571) {

	if (hw->mac.type == e1000_82571) {

		s32 ret_val = 0;

		s32 ret_val;





		/* If there's an alternate MAC address place it in RAR0

		/* If there's an alternate MAC address place it in RAR0

		 * so that it will override the Si installed default perm

		 * so that it will override the Si installed default perm

drivers/net/ethernet/intel/e1000e/Makefile

+2 −2
Original line number Original line Diff line number Diff line 
################################################################################

################################################################################

#

#

# Intel PRO/1000 Linux driver

# Intel PRO/1000 Linux driver

# Copyright(c) 1999 - 2012 Intel Corporation.

# Copyright(c) 1999 - 2013 Intel Corporation.

#

#

# This program is free software; you can redistribute it and/or modify it

# This program is free software; you can redistribute it and/or modify it

# under the terms and conditions of the GNU General Public License,

# under the terms and conditions of the GNU General Public License,
@@ -34,5 +34,5 @@ obj-$(CONFIG_E1000E) += e1000e.o 




e1000e-objs := 82571.o ich8lan.o 80003es2lan.o \

e1000e-objs := 82571.o ich8lan.o 80003es2lan.o \

	       mac.o manage.o nvm.o phy.o \

	       mac.o manage.o nvm.o phy.o \

	       param.o ethtool.o netdev.o

	       param.o ethtool.o netdev.o ptp.o

drivers/net/ethernet/intel/e1000e/defines.h

+21 −1
Original line number Original line Diff line number Diff line 
/*******************************************************************************

/*******************************************************************************





  Intel PRO/1000 Linux driver

  Intel PRO/1000 Linux driver

  Copyright(c) 1999 - 2012 Intel Corporation.

  Copyright(c) 1999 - 2013 Intel Corporation.





  This program is free software; you can redistribute it and/or modify it

  This program is free software; you can redistribute it and/or modify it

  under the terms and conditions of the GNU General Public License,

  under the terms and conditions of the GNU General Public License,
@@ -233,6 +233,7 @@ 
#define E1000_CTRL_FRCDPX   0x00001000  /* Force Duplex */

#define E1000_CTRL_FRCDPX   0x00001000  /* Force Duplex */

#define E1000_CTRL_LANPHYPC_OVERRIDE 0x00010000 /* SW control of LANPHYPC */

#define E1000_CTRL_LANPHYPC_OVERRIDE 0x00010000 /* SW control of LANPHYPC */

#define E1000_CTRL_LANPHYPC_VALUE    0x00020000 /* SW value of LANPHYPC */

#define E1000_CTRL_LANPHYPC_VALUE    0x00020000 /* SW value of LANPHYPC */

#define E1000_CTRL_MEHE     0x00080000  /* Memory Error Handling Enable */

#define E1000_CTRL_SWDPIN0  0x00040000  /* SWDPIN 0 value */

#define E1000_CTRL_SWDPIN0  0x00040000  /* SWDPIN 0 value */

#define E1000_CTRL_SWDPIN1  0x00080000  /* SWDPIN 1 value */

#define E1000_CTRL_SWDPIN1  0x00080000  /* SWDPIN 1 value */

#define E1000_CTRL_SWDPIO0  0x00400000  /* SWDPIN 0 Input or output */

#define E1000_CTRL_SWDPIO0  0x00400000  /* SWDPIN 0 Input or output */
@@ -394,6 +395,12 @@ 




#define E1000_PBS_16K E1000_PBA_16K

#define E1000_PBS_16K E1000_PBA_16K





/* Uncorrectable/correctable ECC Error counts and enable bits */

#define E1000_PBECCSTS_CORR_ERR_CNT_MASK	0x000000FF

#define E1000_PBECCSTS_UNCORR_ERR_CNT_MASK	0x0000FF00

#define E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT	8

#define E1000_PBECCSTS_ECC_ENABLE		0x00010000



#define IFS_MAX       80

#define IFS_MAX       80

#define IFS_MIN       40

#define IFS_MIN       40

#define IFS_RATIO     4

#define IFS_RATIO     4
@@ -413,6 +420,7 @@ 
#define E1000_ICR_RXSEQ         0x00000008 /* Rx sequence error */

#define E1000_ICR_RXSEQ         0x00000008 /* Rx sequence error */

#define E1000_ICR_RXDMT0        0x00000010 /* Rx desc min. threshold (0) */

#define E1000_ICR_RXDMT0        0x00000010 /* Rx desc min. threshold (0) */

#define E1000_ICR_RXT0          0x00000080 /* Rx timer intr (ring 0) */

#define E1000_ICR_RXT0          0x00000080 /* Rx timer intr (ring 0) */

#define E1000_ICR_ECCER         0x00400000 /* Uncorrectable ECC Error */

#define E1000_ICR_INT_ASSERTED  0x80000000 /* If this bit asserted, the driver should claim the interrupt */

#define E1000_ICR_INT_ASSERTED  0x80000000 /* If this bit asserted, the driver should claim the interrupt */

#define E1000_ICR_RXQ0          0x00100000 /* Rx Queue 0 Interrupt */

#define E1000_ICR_RXQ0          0x00100000 /* Rx Queue 0 Interrupt */

#define E1000_ICR_RXQ1          0x00200000 /* Rx Queue 1 Interrupt */

#define E1000_ICR_RXQ1          0x00200000 /* Rx Queue 1 Interrupt */
@@ -448,6 +456,7 @@ 
#define E1000_IMS_RXSEQ     E1000_ICR_RXSEQ     /* Rx sequence error */

#define E1000_IMS_RXSEQ     E1000_ICR_RXSEQ     /* Rx sequence error */

#define E1000_IMS_RXDMT0    E1000_ICR_RXDMT0    /* Rx desc min. threshold */

#define E1000_IMS_RXDMT0    E1000_ICR_RXDMT0    /* Rx desc min. threshold */

#define E1000_IMS_RXT0      E1000_ICR_RXT0      /* Rx timer intr */

#define E1000_IMS_RXT0      E1000_ICR_RXT0      /* Rx timer intr */

#define E1000_IMS_ECCER     E1000_ICR_ECCER     /* Uncorrectable ECC Error */

#define E1000_IMS_RXQ0      E1000_ICR_RXQ0      /* Rx Queue 0 Interrupt */

#define E1000_IMS_RXQ0      E1000_ICR_RXQ0      /* Rx Queue 0 Interrupt */

#define E1000_IMS_RXQ1      E1000_ICR_RXQ1      /* Rx Queue 1 Interrupt */

#define E1000_IMS_RXQ1      E1000_ICR_RXQ1      /* Rx Queue 1 Interrupt */

#define E1000_IMS_TXQ0      E1000_ICR_TXQ0      /* Tx Queue 0 Interrupt */

#define E1000_IMS_TXQ0      E1000_ICR_TXQ0      /* Tx Queue 0 Interrupt */
@@ -544,9 +553,20 @@ 




#define E1000_TSYNCRXCTL_VALID		0x00000001 /* Rx timestamp valid */

#define E1000_TSYNCRXCTL_VALID		0x00000001 /* Rx timestamp valid */

#define E1000_TSYNCRXCTL_TYPE_MASK	0x0000000E /* Rx type mask */

#define E1000_TSYNCRXCTL_TYPE_MASK	0x0000000E /* Rx type mask */

#define E1000_TSYNCRXCTL_TYPE_L2_V2	0x00

#define E1000_TSYNCRXCTL_TYPE_L4_V1	0x02

#define E1000_TSYNCRXCTL_TYPE_L2_L4_V2	0x04

#define E1000_TSYNCRXCTL_TYPE_ALL	0x08

#define E1000_TSYNCRXCTL_TYPE_EVENT_V2	0x0A

#define E1000_TSYNCRXCTL_ENABLED	0x00000010 /* enable Rx timestamping */

#define E1000_TSYNCRXCTL_ENABLED	0x00000010 /* enable Rx timestamping */

#define E1000_TSYNCRXCTL_SYSCFI		0x00000020 /* Sys clock frequency */

#define E1000_TSYNCRXCTL_SYSCFI		0x00000020 /* Sys clock frequency */





#define E1000_RXMTRL_PTP_V1_SYNC_MESSAGE	0x00000000

#define E1000_RXMTRL_PTP_V1_DELAY_REQ_MESSAGE	0x00010000



#define E1000_RXMTRL_PTP_V2_SYNC_MESSAGE	0x00000000

#define E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE	0x01000000



#define E1000_TIMINCA_INCPERIOD_SHIFT	24

#define E1000_TIMINCA_INCPERIOD_SHIFT	24

#define E1000_TIMINCA_INCVALUE_MASK	0x00FFFFFF

#define E1000_TIMINCA_INCVALUE_MASK	0x00FFFFFF