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Commit 6eea2db2 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch '1GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/next-queue 



Jeff Kirsher says:

====================
Intel Wired LAN Driver Updates 2018-12-20

This series contains updates to e100, igb, ixgbe, i40e and ice drivers.

I replaced spinlocks for mutex locks to reduce the latency on CPU0 for
igb when updating the statistics.  This work was based off a patch
provided by Jan Jablonsky, which was against an older version of the igb
driver.

Jesus adjusts the receive packet buffer size from 32K to 30K when
running in QAV mode, to stay within 60K for total packet buffer size for
igb.

Vinicius adds igb kernel documentation regarding the CBS algorithm and
its implementation in the i210 family of NICs.

YueHaibing from Huawei fixed the e100 driver that was potentially
passing a NULL pointer, so use the kernel macro IS_ERR_OR_NULL()
instead.

Konstantin Khorenko fixes i40e where we were not setting up the
neigh_priv_len in our net_device, which caused the driver to read beyond
the neighbor entry allocated memory.

Miroslav Lichvar extends the PTP gettime() to read the system clock by
adding support for PTP_SYS_OFFSET_EXTENDED ioctl in i40e.

Young Xiao fixed the ice driver to only enable NAPI on q_vectors that
actually have transmit and receive rings.

Kai-Heng Feng fixes an igb issue that when placed in suspend mode, the
NIC does not wake up when a cable is plugged in.  This was due to the
driver not setting PME during runtime suspend.

Stephen Douthit enables the ixgbe driver allow DSA devices to use the
MII interface to talk to switches.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 2be09de7 643bae17

Documentation/networking/device_drivers/intel/igb.rst

+19 −0
Original line number Diff line number Diff line
@@ -177,6 +177,25 @@ rate limit using the IProute2 tool. Download the latest version of the 
IProute2 tool from Sourceforge if your version does not have all the features

you require.



Credit Based Shaper (Qav Mode)

------------------------------

When enabling the CBS qdisc in the hardware offload mode, traffic shaping using

the CBS (described in the IEEE 802.1Q-2018 Section 8.6.8.2 and discussed in the

Annex L) algorithm will run in the i210 controller, so it's more accurate and

uses less CPU.



When using offloaded CBS, and the traffic rate obeys the configured rate

(doesn't go above it), CBS should have little to no effect in the latency.



The offloaded version of the algorithm has some limits, caused by how the idle

slope is expressed in the adapter's registers. It can only represent idle slopes

in 16.38431 kbps units, which means that if a idle slope of 2576kbps is

requested, the controller will be configured to use a idle slope of ~2589 kbps,

because the driver rounds the value up. For more details, see the comments on

:c:func:`igb_config_tx_modes()`.



NOTE: This feature is exclusive to i210 models.





Support

=======

drivers/net/ethernet/intel/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -159,6 +159,7 @@ config IXGBE 
	tristate "Intel(R) 10GbE PCI Express adapters support"

	depends on PCI

	select MDIO

	select MDIO_DEVICE

	imply PTP_1588_CLOCK

	---help---

	  This driver supports Intel(R) 10GbE PCI Express family of

drivers/net/ethernet/intel/e100.c

+2 −2
Original line number Diff line number Diff line
@@ -1345,8 +1345,8 @@ static inline int e100_load_ucode_wait(struct nic *nic) 


	fw = e100_request_firmware(nic);

	/* If it's NULL, then no ucode is required */

	if (!fw || IS_ERR(fw))

		return PTR_ERR(fw);

	if (IS_ERR_OR_NULL(fw))

		return PTR_ERR_OR_ZERO(fw);



	if ((err = e100_exec_cb(nic, (void *)fw, e100_setup_ucode)))

		netif_err(nic, probe, nic->netdev,

drivers/net/ethernet/intel/i40e/i40e_main.c

+3 −0
Original line number Diff line number Diff line
@@ -12339,6 +12339,9 @@ static int i40e_config_netdev(struct i40e_vsi *vsi) 
	ether_addr_copy(netdev->dev_addr, mac_addr);

	ether_addr_copy(netdev->perm_addr, mac_addr);



	/* i40iw_net_event() reads 16 bytes from neigh->primary_key */

	netdev->neigh_priv_len = sizeof(u32) * 4;



	netdev->priv_flags |= IFF_UNICAST_FLT;

	netdev->priv_flags |= IFF_SUPP_NOFCS;

	/* Setup netdev TC information */

drivers/net/ethernet/intel/i40e/i40e_ptp.c

+12 −6
Original line number Diff line number Diff line
@@ -28,19 +28,23 @@ 
 * i40e_ptp_read - Read the PHC time from the device

 * @pf: Board private structure

 * @ts: timespec structure to hold the current time value

 * @sts: structure to hold the system time before and after reading the PHC

 *

 * This function reads the PRTTSYN_TIME registers and stores them in a

 * timespec. However, since the registers are 64 bits of nanoseconds, we must

 * convert the result to a timespec before we can return.

 **/

static void i40e_ptp_read(struct i40e_pf *pf, struct timespec64 *ts)

static void i40e_ptp_read(struct i40e_pf *pf, struct timespec64 *ts,

			  struct ptp_system_timestamp *sts)

{

	struct i40e_hw *hw = &pf->hw;

	u32 hi, lo;

	u64 ns;



	/* The timer latches on the lowest register read. */

	ptp_read_system_prets(sts);

	lo = rd32(hw, I40E_PRTTSYN_TIME_L);

	ptp_read_system_postts(sts);

	hi = rd32(hw, I40E_PRTTSYN_TIME_H);



	ns = (((u64)hi) << 32) | lo;
@@ -146,7 +150,7 @@ static int i40e_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) 


	mutex_lock(&pf->tmreg_lock);



	i40e_ptp_read(pf, &now);

	i40e_ptp_read(pf, &now, NULL);

	timespec64_add_ns(&now, delta);

	i40e_ptp_write(pf, (const struct timespec64 *)&now);
@@ -156,19 +160,21 @@ static int i40e_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) 
}



/**

 * i40e_ptp_gettime - Get the time of the PHC

 * i40e_ptp_gettimex - Get the time of the PHC

 * @ptp: The PTP clock structure

 * @ts: timespec structure to hold the current time value

 * @sts: structure to hold the system time before and after reading the PHC

 *

 * Read the device clock and return the correct value on ns, after converting it

 * into a timespec struct.

 **/

static int i40e_ptp_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts)

static int i40e_ptp_gettimex(struct ptp_clock_info *ptp, struct timespec64 *ts,

			     struct ptp_system_timestamp *sts)

{

	struct i40e_pf *pf = container_of(ptp, struct i40e_pf, ptp_caps);



	mutex_lock(&pf->tmreg_lock);

	i40e_ptp_read(pf, ts);

	i40e_ptp_read(pf, ts, sts);

	mutex_unlock(&pf->tmreg_lock);



	return 0;
@@ -702,7 +708,7 @@ static long i40e_ptp_create_clock(struct i40e_pf *pf) 
	pf->ptp_caps.pps = 0;

	pf->ptp_caps.adjfreq = i40e_ptp_adjfreq;

	pf->ptp_caps.adjtime = i40e_ptp_adjtime;

	pf->ptp_caps.gettime64 = i40e_ptp_gettime;

	pf->ptp_caps.gettimex64 = i40e_ptp_gettimex;

	pf->ptp_caps.settime64 = i40e_ptp_settime;

	pf->ptp_caps.enable = i40e_ptp_feature_enable;