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Commit 6ea15d9f authored by Borislav Petkov (AMD)'s avatar Borislav Petkov (AMD) Committed by Greg Kroah-Hartman
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x86/cpu: Fix AMD erratum #1485 on Zen4-based CPUs 



commit f454b18e07f518bcd0c05af17a2239138bff52de upstream.

Fix erratum #1485 on Zen4 parts where running with STIBP disabled can
cause an #UD exception. The performance impact of the fix is negligible.

Reported-by: default avatarRené Rebe <rene@exactcode.de>
Signed-off-by: default avatarBorislav Petkov (AMD) <bp@alien8.de>
Tested-by: default avatarRené Rebe <rene@exactcode.de>
Cc: <stable@kernel.org>
Link: https://lore.kernel.org/r/D99589F4-BC5D-430B-87B2-72C20370CF57@exactcode.com


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent e7ca00f3

arch/x86/include/asm/msr-index.h

+4 −0
Original line number Diff line number Diff line
@@ -502,6 +502,10 @@ 


#define MSR_AMD64_VIRT_SPEC_CTRL	0xc001011f



/* Zen4 */

#define MSR_ZEN4_BP_CFG			0xc001102e

#define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5



/* Fam 17h MSRs */

#define MSR_F17H_IRPERF			0xc00000e9

arch/x86/kernel/cpu/amd.c

+8 −0
Original line number Diff line number Diff line
@@ -75,6 +75,10 @@ static const int amd_zenbleed[] = 
			   AMD_MODEL_RANGE(0x17, 0x90, 0x0, 0x91, 0xf),

			   AMD_MODEL_RANGE(0x17, 0xa0, 0x0, 0xaf, 0xf));



static const int amd_erratum_1485[] =

	AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x19, 0x10, 0x0, 0x1f, 0xf),

			   AMD_MODEL_RANGE(0x19, 0x60, 0x0, 0xaf, 0xf));



static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum)

{

	int osvw_id = *erratum++;
@@ -1117,6 +1121,10 @@ static void init_amd(struct cpuinfo_x86 *c) 
	check_null_seg_clears_base(c);



	zenbleed_check(c);



	if (!cpu_has(c, X86_FEATURE_HYPERVISOR) &&

	     cpu_has_amd_erratum(c, amd_erratum_1485))

		msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT);

}



#ifdef CONFIG_X86_32