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Commit 6e616864 authored by Suzuki K Poulose's avatar Suzuki K Poulose Committed by Will Deacon
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arm64: Add MIDR encoding for Arm Cortex-A55 and Cortex-A35 



Update the MIDR encodings for the Cortex-A55 and Cortex-A35

Cc: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: default avatarDave Martin <dave.martin@arm.com>
Signed-off-by: default avatarSuzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
parent ba7d9233

arch/arm64/include/asm/cputype.h

+4 −0
Original line number Diff line number Diff line
@@ -83,6 +83,8 @@ 
#define ARM_CPU_PART_CORTEX_A53		0xD03

#define ARM_CPU_PART_CORTEX_A73		0xD09

#define ARM_CPU_PART_CORTEX_A75		0xD0A

#define ARM_CPU_PART_CORTEX_A35		0xD04

#define ARM_CPU_PART_CORTEX_A55		0xD05



#define APM_CPU_PART_POTENZA		0x000
@@ -102,6 +104,8 @@ 
#define MIDR_CORTEX_A72 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A72)

#define MIDR_CORTEX_A73 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A73)

#define MIDR_CORTEX_A75 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A75)

#define MIDR_CORTEX_A35 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A35)

#define MIDR_CORTEX_A55 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A55)

#define MIDR_THUNDERX	MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX)

#define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX)

#define MIDR_THUNDERX_83XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_83XX)