Loading arch/arm/configs/vendor/sdxlemur-debug.config +5 −0 Original line number Diff line number Diff line Loading @@ -18,6 +18,11 @@ CONFIG_FAULT_INJECTION_DEBUG_FS=y CONFIG_FAULT_INJECTION_STACKTRACE_FILTER=y CONFIG_DEBUG_USER=y # CONFIG_USB_GADGET_DEBUG_FS is not set CONFIG_IOMMU_DEBUG=y CONFIG_IOMMU_TESTS=y CONFIG_IOMMU_TLBSYNC_DEBUG=y CONFIG_DEBUG_PANIC_ON_OOM=y CONFIG_OF_RESERVED_MEM_CHECK=y CONFIG_REGULATOR_FIXED_VOLTAGE=y CONFIG_REGULATOR_PROXY_CONSUMER=y CONFIG_REGULATOR_STUB=y Loading arch/arm/configs/vendor/sdxlemur.config +18 −0 Original line number Diff line number Diff line Loading @@ -11,6 +11,24 @@ CONFIG_REGULATOR_FIXED_VOLTAGE=y CONFIG_REGULATOR_PROXY_CONSUMER=y CONFIG_REGULATOR_STUB=y # CONFIG_REGULATOR_PROXY_CONSUMER_LEGACY is not set CONFIG_ARM_SMMU=y CONFIG_IOMMU_IO_PGTABLE_FAST=y CONFIG_QCOM_IOMMU_IO_PGTABLE_QUIRKS=y CONFIG_IOMMU_LIMIT_IOVA_ALIGNMENT=y CONFIG_QTI_IOMMU_SUPPORT=y CONFIG_QCOM_SCM=y CONFIG_QCOM_SECURE_BUFFER=y CONFIG_DMA_COHERENT_HINT_CACHED=y CONFIG_ION=y CONFIG_ION_MSM_HEAPS=y CONFIG_ION_DEFER_FREE_NO_SCHED_IDLE=y CONFIG_QCOM_LAZY_MAPPING=y CONFIG_SLAB_FREELIST_RANDOM=y CONFIG_SLAB_FREELIST_HARDENED=y CONFIG_ZSMALLOC=y CONFIG_ZRAM=y CONFIG_BALANCE_ANON_FILE_RECLAIM=y CONFIG_VM_EVENT_COUNT_CLEAN_PAGE_RECLAIM=y CONFIG_QRTR=y CONFIG_QRTR_SMD=y CONFIG_MAILBOX=y Loading drivers/iommu/dma-mapping-fast.c +5 −5 Original line number Diff line number Diff line Loading @@ -731,15 +731,15 @@ static void fast_smmu_dma_unmap_resource( } static void __fast_smmu_mapped_over_stale(struct dma_fast_smmu_mapping *fast, void *data) void *priv) { av8l_fast_iopte *pmds, *ptep = data; av8l_fast_iopte *pmds, *ptep = priv; dma_addr_t iova; unsigned long bitmap_idx; struct io_pgtable *tbl; struct av8l_fast_io_pgtable *data; tbl = container_of(fast->pgtbl_ops, struct io_pgtable, ops); pmds = tbl->cfg.av8l_fast_cfg.pmds; data = iof_pgtable_ops_to_data(fast->pgtbl_ops); pmds = data->pmds; bitmap_idx = (unsigned long)(ptep - pmds); iova = bitmap_idx << FAST_PAGE_SHIFT; Loading drivers/iommu/io-pgtable-fast.c +5 −25 Original line number Diff line number Diff line Loading @@ -20,24 +20,6 @@ #define AV8L_FAST_MAX_ADDR_BITS 48 /* Struct accessors */ #define iof_pgtable_to_data(x) \ container_of((x), struct av8l_fast_io_pgtable, iop) #define iof_pgtable_ops_to_pgtable(x) \ container_of((x), struct io_pgtable, ops) #define iof_pgtable_ops_to_data(x) \ iof_pgtable_to_data(iof_pgtable_ops_to_pgtable(x)) struct av8l_fast_io_pgtable { struct io_pgtable iop; av8l_fast_iopte *pgd; av8l_fast_iopte *puds[4]; av8l_fast_iopte *pmds; struct page **pages; /* page table memory */ }; /* Page table bits */ #define AV8L_FAST_PTE_TYPE_SHIFT 0 #define AV8L_FAST_PTE_TYPE_MASK 0x3 Loading Loading @@ -588,7 +570,7 @@ av8l_fast_alloc_pgtable(struct io_pgtable_cfg *cfg, void *cookie) #if defined(CONFIG_ARM) reg |= ARM_32_LPAE_TCR_EAE; #endif cfg->av8l_fast_cfg.tcr = reg; cfg->arm_lpae_s1_cfg.tcr = reg; /* MAIRs */ reg = (AV8L_FAST_MAIR_ATTR_NC Loading @@ -600,18 +582,16 @@ av8l_fast_alloc_pgtable(struct io_pgtable_cfg *cfg, void *cookie) (AV8L_FAST_MAIR_ATTR_UPSTREAM << AV8L_FAST_MAIR_ATTR_SHIFT(AV8L_FAST_MAIR_ATTR_IDX_UPSTREAM)); cfg->av8l_fast_cfg.mair[0] = reg; cfg->av8l_fast_cfg.mair[1] = 0; cfg->arm_lpae_s1_cfg.mair[0] = reg; cfg->arm_lpae_s1_cfg.mair[1] = 0; /* Allocate all page table memory! */ if (av8l_fast_prepopulate_pgtables(data, cfg, cookie)) goto out_free_data; cfg->av8l_fast_cfg.pmds = data->pmds; /* TTBRs */ cfg->av8l_fast_cfg.ttbr[0] = virt_to_phys(data->pgd); cfg->av8l_fast_cfg.ttbr[1] = 0; cfg->arm_lpae_s1_cfg.ttbr[0] = virt_to_phys(data->pgd); cfg->arm_lpae_s1_cfg.ttbr[1] = 0; return &data->iop; out_free_data: Loading drivers/iommu/iommu-logger.c +3 −7 Original line number Diff line number Diff line Loading @@ -62,17 +62,13 @@ static int iommu_logger_domain_ttbrs(struct io_pgtable *iop, void **ttbr0_ptr, switch (iop->fmt) { case ARM_32_LPAE_S1: case ARM_64_LPAE_S1: ttbr0 = iop->cfg.arm_lpae_s1_cfg.ttbr[0]; ttbr1 = iop->cfg.arm_lpae_s1_cfg.ttbr[1]; ret = 0; break; #ifdef CONFIG_IOMMU_IO_PGTABLE_FAST case ARM_V8L_FAST: ttbr0 = iop->cfg.av8l_fast_cfg.ttbr[0]; ttbr1 = iop->cfg.av8l_fast_cfg.ttbr[1]; #endif ttbr0 = iop->cfg.arm_lpae_s1_cfg.ttbr[0]; ttbr1 = iop->cfg.arm_lpae_s1_cfg.ttbr[1]; ret = 0; break; #endif default: ret = -EINVAL; } Loading Loading
arch/arm/configs/vendor/sdxlemur-debug.config +5 −0 Original line number Diff line number Diff line Loading @@ -18,6 +18,11 @@ CONFIG_FAULT_INJECTION_DEBUG_FS=y CONFIG_FAULT_INJECTION_STACKTRACE_FILTER=y CONFIG_DEBUG_USER=y # CONFIG_USB_GADGET_DEBUG_FS is not set CONFIG_IOMMU_DEBUG=y CONFIG_IOMMU_TESTS=y CONFIG_IOMMU_TLBSYNC_DEBUG=y CONFIG_DEBUG_PANIC_ON_OOM=y CONFIG_OF_RESERVED_MEM_CHECK=y CONFIG_REGULATOR_FIXED_VOLTAGE=y CONFIG_REGULATOR_PROXY_CONSUMER=y CONFIG_REGULATOR_STUB=y Loading
arch/arm/configs/vendor/sdxlemur.config +18 −0 Original line number Diff line number Diff line Loading @@ -11,6 +11,24 @@ CONFIG_REGULATOR_FIXED_VOLTAGE=y CONFIG_REGULATOR_PROXY_CONSUMER=y CONFIG_REGULATOR_STUB=y # CONFIG_REGULATOR_PROXY_CONSUMER_LEGACY is not set CONFIG_ARM_SMMU=y CONFIG_IOMMU_IO_PGTABLE_FAST=y CONFIG_QCOM_IOMMU_IO_PGTABLE_QUIRKS=y CONFIG_IOMMU_LIMIT_IOVA_ALIGNMENT=y CONFIG_QTI_IOMMU_SUPPORT=y CONFIG_QCOM_SCM=y CONFIG_QCOM_SECURE_BUFFER=y CONFIG_DMA_COHERENT_HINT_CACHED=y CONFIG_ION=y CONFIG_ION_MSM_HEAPS=y CONFIG_ION_DEFER_FREE_NO_SCHED_IDLE=y CONFIG_QCOM_LAZY_MAPPING=y CONFIG_SLAB_FREELIST_RANDOM=y CONFIG_SLAB_FREELIST_HARDENED=y CONFIG_ZSMALLOC=y CONFIG_ZRAM=y CONFIG_BALANCE_ANON_FILE_RECLAIM=y CONFIG_VM_EVENT_COUNT_CLEAN_PAGE_RECLAIM=y CONFIG_QRTR=y CONFIG_QRTR_SMD=y CONFIG_MAILBOX=y Loading
drivers/iommu/dma-mapping-fast.c +5 −5 Original line number Diff line number Diff line Loading @@ -731,15 +731,15 @@ static void fast_smmu_dma_unmap_resource( } static void __fast_smmu_mapped_over_stale(struct dma_fast_smmu_mapping *fast, void *data) void *priv) { av8l_fast_iopte *pmds, *ptep = data; av8l_fast_iopte *pmds, *ptep = priv; dma_addr_t iova; unsigned long bitmap_idx; struct io_pgtable *tbl; struct av8l_fast_io_pgtable *data; tbl = container_of(fast->pgtbl_ops, struct io_pgtable, ops); pmds = tbl->cfg.av8l_fast_cfg.pmds; data = iof_pgtable_ops_to_data(fast->pgtbl_ops); pmds = data->pmds; bitmap_idx = (unsigned long)(ptep - pmds); iova = bitmap_idx << FAST_PAGE_SHIFT; Loading
drivers/iommu/io-pgtable-fast.c +5 −25 Original line number Diff line number Diff line Loading @@ -20,24 +20,6 @@ #define AV8L_FAST_MAX_ADDR_BITS 48 /* Struct accessors */ #define iof_pgtable_to_data(x) \ container_of((x), struct av8l_fast_io_pgtable, iop) #define iof_pgtable_ops_to_pgtable(x) \ container_of((x), struct io_pgtable, ops) #define iof_pgtable_ops_to_data(x) \ iof_pgtable_to_data(iof_pgtable_ops_to_pgtable(x)) struct av8l_fast_io_pgtable { struct io_pgtable iop; av8l_fast_iopte *pgd; av8l_fast_iopte *puds[4]; av8l_fast_iopte *pmds; struct page **pages; /* page table memory */ }; /* Page table bits */ #define AV8L_FAST_PTE_TYPE_SHIFT 0 #define AV8L_FAST_PTE_TYPE_MASK 0x3 Loading Loading @@ -588,7 +570,7 @@ av8l_fast_alloc_pgtable(struct io_pgtable_cfg *cfg, void *cookie) #if defined(CONFIG_ARM) reg |= ARM_32_LPAE_TCR_EAE; #endif cfg->av8l_fast_cfg.tcr = reg; cfg->arm_lpae_s1_cfg.tcr = reg; /* MAIRs */ reg = (AV8L_FAST_MAIR_ATTR_NC Loading @@ -600,18 +582,16 @@ av8l_fast_alloc_pgtable(struct io_pgtable_cfg *cfg, void *cookie) (AV8L_FAST_MAIR_ATTR_UPSTREAM << AV8L_FAST_MAIR_ATTR_SHIFT(AV8L_FAST_MAIR_ATTR_IDX_UPSTREAM)); cfg->av8l_fast_cfg.mair[0] = reg; cfg->av8l_fast_cfg.mair[1] = 0; cfg->arm_lpae_s1_cfg.mair[0] = reg; cfg->arm_lpae_s1_cfg.mair[1] = 0; /* Allocate all page table memory! */ if (av8l_fast_prepopulate_pgtables(data, cfg, cookie)) goto out_free_data; cfg->av8l_fast_cfg.pmds = data->pmds; /* TTBRs */ cfg->av8l_fast_cfg.ttbr[0] = virt_to_phys(data->pgd); cfg->av8l_fast_cfg.ttbr[1] = 0; cfg->arm_lpae_s1_cfg.ttbr[0] = virt_to_phys(data->pgd); cfg->arm_lpae_s1_cfg.ttbr[1] = 0; return &data->iop; out_free_data: Loading
drivers/iommu/iommu-logger.c +3 −7 Original line number Diff line number Diff line Loading @@ -62,17 +62,13 @@ static int iommu_logger_domain_ttbrs(struct io_pgtable *iop, void **ttbr0_ptr, switch (iop->fmt) { case ARM_32_LPAE_S1: case ARM_64_LPAE_S1: ttbr0 = iop->cfg.arm_lpae_s1_cfg.ttbr[0]; ttbr1 = iop->cfg.arm_lpae_s1_cfg.ttbr[1]; ret = 0; break; #ifdef CONFIG_IOMMU_IO_PGTABLE_FAST case ARM_V8L_FAST: ttbr0 = iop->cfg.av8l_fast_cfg.ttbr[0]; ttbr1 = iop->cfg.av8l_fast_cfg.ttbr[1]; #endif ttbr0 = iop->cfg.arm_lpae_s1_cfg.ttbr[0]; ttbr1 = iop->cfg.arm_lpae_s1_cfg.ttbr[1]; ret = 0; break; #endif default: ret = -EINVAL; } Loading