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Commit 6d886fd0 authored by Andre Przywara's avatar Andre Przywara Committed by H. Peter Anvin
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x86, cpu: Fix allowed CPUID bits for KVM guests 



The AMD extensions to AVX (FMA4, XOP) work on the same YMM register set
as AVX, so they are safe for guests to use, as long as AVX itself
is allowed. Add F16C and AES on the way for the same reasons.

Signed-off-by: default avatarAndre Przywara <andre.przywara@amd.com>
LKML-Reference: <1283778860-26843-4-git-send-email-andre.przywara@amd.com>
Acked-by: default avatarAvi Kivity <avi@redhat.com>
Signed-off-by: default avatarH. Peter Anvin <hpa@linux.intel.com>
parent 33ed82fb

arch/x86/kvm/x86.c

+3 −2
Original line number Diff line number Diff line
@@ -1991,13 +1991,14 @@ static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function, 
		0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |

		0 /* Reserved, DCA */ | F(XMM4_1) |

		F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |

		0 /* Reserved, AES */ | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX);

		0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |

		F(F16C);

	/* cpuid 0x80000001.ecx */

	const u32 kvm_supported_word6_x86_features =

		F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |

		F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |

		F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP) |

		0 /* SKINIT */ | 0 /* WDT */;

		0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM);



	/* all calls to cpuid_count() should be made on the same cpu */

	get_cpu();