Commit 6d671e1b authored Dec 22, 2017 by Peter Zijlstra Committed by Thomas Gleixner Jan 14, 2018

x86/time: Unconditionally register legacy timer interrupt



Even without a PIC/PIT the legacy timer interrupt is required for HPET in
legacy replacement mode.

Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: len.brown@intel.com
Cc: rui.zhang@intel.com
Link: https://lkml.kernel.org/r/20171222092243.382623763@infradead.org

parent 30c7e5b1

arch/x86/kernel/time.c

+6 −3

Original line number	Diff line number	Diff line
		@@ -69,9 +69,12 @@ static struct irqaction irq0 = {

		static void __init setup_default_timer_irq(void)
		{
		if (!nr_legacy_irqs())
		return;
		setup_irq(0, &irq0);
		/*
		* Unconditionally register the legacy timer; even without legacy
		* PIC/PIT we need this for the HPET0 in legacy replacement mode.
		*/
		if (setup_irq(0, &irq0))
		pr_info("Failed to register legacy timer interrupt\n");
		}

		/* Default timer init function */