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Commit 6d45a402 authored by Anson Huang's avatar Anson Huang Committed by Shawn Guo
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ARM: imx: add i.MX7ULP cpuidle support



This patch adds cpuidle support for i.MX7ULP, 3 cpuidle
states supported as below:

1. WFI, just ARM wfi;
2. WAIT mode, mapped to SoC's partial stop mode #3;
3. STOP mode, mapped to SoC's partial stop mode #1.

In WAIT mode, system clock and bus clock will be enabled;
In STOP mode, system clock and bus clock will be disabled.

Signed-off-by: default avatarAnson Huang <Anson.Huang@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 23b2441b
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+1 −0
Original line number Diff line number Diff line
@@ -29,6 +29,7 @@ obj-$(CONFIG_SOC_IMX6SL) += cpuidle-imx6sl.o
obj-$(CONFIG_SOC_IMX6SLL) += cpuidle-imx6sx.o
obj-$(CONFIG_SOC_IMX6SX) += cpuidle-imx6sx.o
obj-$(CONFIG_SOC_IMX6UL) += cpuidle-imx6sx.o
obj-$(CONFIG_SOC_IMX7ULP) += cpuidle-imx7ulp.o
endif

ifdef CONFIG_SND_SOC_IMX_PCM_FIQ
+10 −0
Original line number Diff line number Diff line
@@ -72,6 +72,15 @@ enum mxc_cpu_pwr_mode {
	STOP_POWER_OFF,		/* STOP + SRPG */
};

enum ulp_cpu_pwr_mode {
	ULP_PM_HSRUN,    /* High speed run mode */
	ULP_PM_RUN,      /* Run mode */
	ULP_PM_WAIT,     /* Wait mode */
	ULP_PM_STOP,     /* Stop mode */
	ULP_PM_VLPS,     /* Very low power stop mode */
	ULP_PM_VLLS,     /* very low leakage stop mode */
};

void imx_enable_cpu(int cpu, bool enable);
void imx_set_cpu_jump(int cpu, void *jump_addr);
u32 imx_get_cpu_arg(int cpu);
@@ -98,6 +107,7 @@ int imx6_set_lpm(enum mxc_cpu_pwr_mode mode);
void imx6_set_int_mem_clk_lpm(bool enable);
void imx6sl_set_wait_clk(bool enter);
int imx_mmdc_get_ddr_type(void);
int imx7ulp_set_lpm(enum ulp_cpu_pwr_mode mode);

void imx_cpu_die(unsigned int cpu);
int imx_cpu_kill(unsigned int cpu);
+60 −0
Original line number Diff line number Diff line
// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright (C) 2016 Freescale Semiconductor, Inc.
 * Copyright 2017-2018 NXP
 *   Anson Huang <Anson.Huang@nxp.com>
 */

#include <linux/cpuidle.h>
#include <linux/module.h>
#include <asm/cpuidle.h>

#include "common.h"
#include "cpuidle.h"

static int imx7ulp_enter_wait(struct cpuidle_device *dev,
			    struct cpuidle_driver *drv, int index)
{
	if (index == 1)
		imx7ulp_set_lpm(ULP_PM_WAIT);
	else
		imx7ulp_set_lpm(ULP_PM_STOP);

	cpu_do_idle();

	imx7ulp_set_lpm(ULP_PM_RUN);

	return index;
}

static struct cpuidle_driver imx7ulp_cpuidle_driver = {
	.name = "imx7ulp_cpuidle",
	.owner = THIS_MODULE,
	.states = {
		/* WFI */
		ARM_CPUIDLE_WFI_STATE,
		/* WAIT */
		{
			.exit_latency = 50,
			.target_residency = 75,
			.enter = imx7ulp_enter_wait,
			.name = "WAIT",
			.desc = "PSTOP2",
		},
		/* STOP */
		{
			.exit_latency = 100,
			.target_residency = 150,
			.enter = imx7ulp_enter_wait,
			.name = "STOP",
			.desc = "PSTOP1",
		},
	},
	.state_count = 3,
	.safe_state_index = 0,
};

int __init imx7ulp_cpuidle_init(void)
{
	return cpuidle_register(&imx7ulp_cpuidle_driver, NULL);
}
+5 −0
Original line number Diff line number Diff line
@@ -15,6 +15,7 @@ extern int imx5_cpuidle_init(void);
extern int imx6q_cpuidle_init(void);
extern int imx6sl_cpuidle_init(void);
extern int imx6sx_cpuidle_init(void);
extern int imx7ulp_cpuidle_init(void);
#else
static inline int imx5_cpuidle_init(void)
{
@@ -32,4 +33,8 @@ static inline int imx6sx_cpuidle_init(void)
{
	return 0;
}
static inline int imx7ulp_cpuidle_init(void)
{
	return 0;
}
#endif
+7 −0
Original line number Diff line number Diff line
@@ -10,6 +10,7 @@
#include <asm/mach/arch.h>

#include "common.h"
#include "cpuidle.h"
#include "hardware.h"

static void __init imx7ulp_init_machine(void)
@@ -25,7 +26,13 @@ static const char *const imx7ulp_dt_compat[] __initconst = {
	NULL,
};

static void __init imx7ulp_init_late(void)
{
	imx7ulp_cpuidle_init();
}

DT_MACHINE_START(IMX7ulp, "Freescale i.MX7ULP (Device Tree)")
	.init_machine	= imx7ulp_init_machine,
	.dt_compat	= imx7ulp_dt_compat,
	.init_late	= imx7ulp_init_late,
MACHINE_END
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