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Commit 6d01f510 authored by Paul Mundt's avatar Paul Mundt
Browse files

sh: Add SH7203 CPU support. 



This adds support for the SH7203 (SH-2A) CPU.

Signed-off-by: default avatarKieran Bingham <kbingham@mpc-data.co.uk>
Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent ff1b7506

arch/sh/Kconfig

+6 −2
Original line number Diff line number Diff line
@@ -158,6 +158,10 @@ config CPU_SUBTYPE_SH7619 


# SH-2A Processor Support



config CPU_SUBTYPE_SH7203

	bool "Support SH7203 processor"

	select CPU_SH2A



config CPU_SUBTYPE_SH7206

	bool "Support SH7206 processor"

	select CPU_SH2A
@@ -556,7 +560,7 @@ config SH_PCLK_FREQ 
	default "32000000" if CPU_SUBTYPE_SH7722

	default "33333333" if CPU_SUBTYPE_SH7770 || \

			      CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7705 || \

			      CPU_SUBTYPE_SH7206

			      CPU_SUBTYPE_SH7203 || CPU_SUBTYPE_SH7206

	default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R

	default "66000000" if CPU_SUBTYPE_SH4_202

	default "50000000"
@@ -567,7 +571,7 @@ config SH_PCLK_FREQ 


config SH_CLK_MD

	int "CPU Mode Pin Setting"

	depends on CPU_SUBTYPE_SH7619 || CPU_SUBTYPE_SH7206

	depends on CPU_SH2

	default 6 if CPU_SUBTYPE_SH7206

	default 5 if CPU_SUBTYPE_SH7619

	default 0

arch/sh/Kconfig.debug

+1 −0
Original line number Diff line number Diff line
@@ -32,6 +32,7 @@ config EARLY_SCIF_CONSOLE_PORT 
	depends on EARLY_SCIF_CONSOLE

	default "0xffe00000" if CPU_SUBTYPE_SH7780

	default "0xffea0000" if CPU_SUBTYPE_SH7785

	default "0xfffe8000" if CPU_SUBTYPE_SH7203

	default "0xfffe9800" if CPU_SUBTYPE_SH7206

	default "0xf8420000" if CPU_SUBTYPE_SH7619

	default "0xa4400000" if CPU_SUBTYPE_SH7712 || CPU_SUBTYPE_SH7705

arch/sh/kernel/cpu/sh2a/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -7,3 +7,4 @@ obj-y := common.o probe.o opcode_helper.o 
common-y	+= $(addprefix ../sh2/, ex.o entry.o)



obj-$(CONFIG_CPU_SUBTYPE_SH7206) += setup-sh7206.o clock-sh7206.o

obj-$(CONFIG_CPU_SUBTYPE_SH7203) += setup-sh7203.o clock-sh7203.o

arch/sh/kernel/cpu/sh2a/clock-sh7203.c

0 → 100644
+89 −0
Original line number Diff line number Diff line 
/*

 * arch/sh/kernel/cpu/sh2a/clock-sh7203.c

 *

 * SH7203 support for the clock framework

 *

 *  Copyright (C) 2007 Kieran Bingham (MPC-Data Ltd)

 *

 * Based on clock-sh7263.c

 *  Copyright (C) 2006  Yoshinori Sato

 *

 * Based on clock-sh4.c

 *  Copyright (C) 2005  Paul Mundt

 *

 * This file is subject to the terms and conditions of the GNU General Public

 * License.  See the file "COPYING" in the main directory of this archive

 * for more details.

 */

#include <linux/init.h>

#include <linux/kernel.h>

#include <asm/clock.h>

#include <asm/freq.h>

#include <asm/io.h>



const static int pll1rate[]={8,12,16,0};

const static int pfc_divisors[]={1,2,3,4,6,8,12};

#define ifc_divisors pfc_divisors



#if (CONFIG_SH_CLK_MD == 0)

#define PLL2 (1)

#elif (CONFIG_SH_CLK_MD == 1)

#define PLL2 (2)

#elif (CONFIG_SH_CLK_MD == 2)

#define PLL2 (4)

#elif (CONFIG_SH_CLK_MD == 3)

#define PLL2 (4)

#else

#error "Illegal Clock Mode!"

#endif



static void master_clk_init(struct clk *clk)

{

	clk->rate *= pll1rate[(ctrl_inw(FREQCR) >> 8) & 0x0003] * PLL2 ;

}



static struct clk_ops sh7203_master_clk_ops = {

	.init		= master_clk_init,

};



static void module_clk_recalc(struct clk *clk)

{

	int idx = (ctrl_inw(FREQCR) & 0x0007);

	clk->rate = clk->parent->rate / pfc_divisors[idx];

}



static struct clk_ops sh7203_module_clk_ops = {

	.recalc		= module_clk_recalc,

};



static void bus_clk_recalc(struct clk *clk)

{

	int idx = (ctrl_inw(FREQCR) & 0x0007);

	clk->rate = clk->parent->rate / pfc_divisors[idx-2];

}



static struct clk_ops sh7203_bus_clk_ops = {

	.recalc		= bus_clk_recalc,

};



static void cpu_clk_recalc(struct clk *clk)

{

	clk->rate = clk->parent->rate;

}



static struct clk_ops sh7203_cpu_clk_ops = {

	.recalc		= cpu_clk_recalc,

};



static struct clk_ops *sh7203_clk_ops[] = {

	&sh7203_master_clk_ops,

	&sh7203_module_clk_ops,

	&sh7203_bus_clk_ops,

	&sh7203_cpu_clk_ops,

};



void __init arch_init_clk_ops(struct clk_ops **ops, int idx)

{

	if (idx < ARRAY_SIZE(sh7203_clk_ops))

		*ops = sh7203_clk_ops[idx];

}

arch/sh/kernel/cpu/sh2a/probe.c

+13 −6
Original line number Diff line number Diff line
@@ -3,23 +3,31 @@ 
 *

 * CPU Subtype Probing for SH-2A.

 *

 * Copyright (C) 2004, 2005 Paul Mundt

 * Copyright (C) 2004 - 2007  Paul Mundt

 *

 * This file is subject to the terms and conditions of the GNU General Public

 * License.  See the file "COPYING" in the main directory of this archive

 * for more details.

 */



#include <linux/init.h>

#include <asm/processor.h>

#include <asm/cache.h>



int __init detect_cpu_and_cache_system(void)

{

	/* Just SH7206 for now .. */

	boot_cpu_data.type			= CPU_SH7206;

	/* All SH-2A CPUs have support for 16 and 32-bit opcodes.. */

	boot_cpu_data.flags			|= CPU_HAS_OP32;



#if defined(CONFIG_CPU_SUBTYPE_SH7203)

	boot_cpu_data.type			= CPU_SH7203;

	/* SH7203 has an FPU.. */

	boot_cpu_data.flags			|= CPU_HAS_FPU;

#elif defined(CONFIG_CPU_SUBTYPE_SH7206)

	boot_cpu_data.type			= CPU_SH7206;

	/* While SH7206 has a DSP.. */

	boot_cpu_data.flags			|= CPU_HAS_DSP;

#endif



	boot_cpu_data.dcache.ways		= 4;

	boot_cpu_data.dcache.way_incr		= (1 << 11);

	boot_cpu_data.dcache.sets		= 128;
@@ -37,4 +45,3 @@ int __init detect_cpu_and_cache_system(void) 


	return 0;

}