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Commit 6cec7c4a authored by Paul Burton's avatar Paul Burton Committed by Ralf Baechle
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MIPS: Don't assume 64-bit FP registers for dump_{,task_}fpu 



This code assumed that saved FP registers are 64 bits wide, an
assumption which will no longer be true once MSA is introduced. This
patch modifies the code to copy the lower 64 bits of each register in
turn, which is safe for any FP register width >= 64 bits.

Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6425/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent ef1c47af

arch/mips/kernel/process.c

+14 −2
Original line number Diff line number Diff line
@@ -157,7 +157,13 @@ int copy_thread(unsigned long clone_flags, unsigned long usp, 
/* Fill in the fpu structure for a core dump.. */

int dump_fpu(struct pt_regs *regs, elf_fpregset_t *r)

{

	memcpy(r, &current->thread.fpu, sizeof(current->thread.fpu));

	int i;



	for (i = 0; i < NUM_FPU_REGS; i++)

		memcpy(&r[i], &current->thread.fpu.fpr[i], sizeof(*r));



	memcpy(&r[NUM_FPU_REGS], &current->thread.fpu.fcr31,

	       sizeof(current->thread.fpu.fcr31));



	return 1;

}
@@ -192,7 +198,13 @@ int dump_task_regs(struct task_struct *tsk, elf_gregset_t *regs) 


int dump_task_fpu(struct task_struct *t, elf_fpregset_t *fpr)

{

	memcpy(fpr, &t->thread.fpu, sizeof(current->thread.fpu));

	int i;



	for (i = 0; i < NUM_FPU_REGS; i++)

		memcpy(&fpr[i], &t->thread.fpu.fpr[i], sizeof(*fpr));



	memcpy(&fpr[NUM_FPU_REGS], &t->thread.fpu.fcr31,

	       sizeof(t->thread.fpu.fcr31));



	return 1;

}