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Commit 6c2b3881 authored by Thierry Reding's avatar Thierry Reding
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dt-bindings: display: tegra: Support SOR crossbar configuration 



The SOR has a crossbar that can map each lane of the SOR to each of the
SOR pads. The mapping is usually the same across designs for a specific
SoC generation, but every now and then there's a design that doesn't.

Allow the crossbar configuration to be specified in device tree to make
it possible to support these designs.

Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent f3779cb1

Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt

+3 −0
Original line number Diff line number Diff line
@@ -238,6 +238,9 @@ of the following host1x client modules: 
  - nvidia,hpd-gpio: specifies a GPIO used for hotplug detection

  - nvidia,edid: supplies a binary EDID blob

  - nvidia,panel: phandle of a display panel

  - nvidia,xbar-cfg: 5 cells containing the crossbar configuration. Each lane

    of the SOR, identified by the cell's index, is mapped via the crossbar to

    the pad specified by the cell's value.



  Optional properties when driving an eDP output:

  - nvidia,dpaux: phandle to a DispayPort AUX interface