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Commit 6c225706 authored by David S. Miller's avatar David S. Miller
Browse files

Merge tag 'mlx5e-pedit' of git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux 



Or Gerlitz says:

====================
mlx5e-pedit 2017-03-28

This series adds support for offloading modifications of packet headers using
ConnectX-5 HW header re-write as an action applied during packet steering.

The offloaded SW mechanism is TC's pedit action. The offloading is
supported for E-Switch steering of VF traffic in the SRIOV
switchdev mode and for NIC (non eswitch) RX.

One use-case for this offload on virtual networks, is when the hypervisor
implements flow based router such as Open-Stack's DVR, where L2 headers
of guest packets re-written with routers' MAC addresses and the IP TTL
is decremented.

Another use case (which can be applied in parallel with routing) is
stateless NAT where guest L3/L4 headers are re-written.

The series is built as follows: the 1st six patches are preperations which
don't yet add new functionality, patches 7-8 add the FW APIs (data-structures
and commands) for header re-write, and patch nine allows offloading driver
to access pedit keys.

The 10th patch is somehow the core of the series, where we translate from
the pedit way to represent set of header modification elements to the FW
API for that same matter.

Once a set of HW modification is established, we register it with the FW
and get a modify header ID. When this ID is used with an action during
packet steering, the HW applies the header modification on the packet.

Patches 11 and 12 implement the above logic as an offload for pedit action
for the NIC and E-Switch use-cases.

I'd like to thanks Elijah Shakkour <elijahs@mellanox.com> for implementing
and helping me testing this functionality on HW simulator, before it could
be done with FW.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents e944e97a d7e75a32

drivers/net/ethernet/mellanox/mlx5/core/cmd.c

+16 −12
Original line number Diff line number Diff line
@@ -279,6 +279,8 @@ static int mlx5_internal_err_ret_value(struct mlx5_core_dev *dev, u16 op, 
	case MLX5_CMD_OP_DESTROY_XRC_SRQ:

	case MLX5_CMD_OP_DESTROY_DCT:

	case MLX5_CMD_OP_DEALLOC_Q_COUNTER:

	case MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT:

	case MLX5_CMD_OP_DESTROY_QOS_PARA_VPORT:

	case MLX5_CMD_OP_DEALLOC_PD:

	case MLX5_CMD_OP_DEALLOC_UAR:

	case MLX5_CMD_OP_DETACH_FROM_MCG:
@@ -305,8 +307,7 @@ static int mlx5_internal_err_ret_value(struct mlx5_core_dev *dev, u16 op, 
	case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:

	case MLX5_CMD_OP_SET_FLOW_TABLE_ROOT:

	case MLX5_CMD_OP_DEALLOC_ENCAP_HEADER:

	case MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT:

	case MLX5_CMD_OP_DESTROY_QOS_PARA_VPORT:

	case MLX5_CMD_OP_DEALLOC_MODIFY_HEADER_CONTEXT:

		return MLX5_CMD_STAT_OK;



	case MLX5_CMD_OP_QUERY_HCA_CAP:
@@ -363,6 +364,10 @@ static int mlx5_internal_err_ret_value(struct mlx5_core_dev *dev, u16 op, 
	case MLX5_CMD_OP_QUERY_Q_COUNTER:

	case MLX5_CMD_OP_SET_RATE_LIMIT:

	case MLX5_CMD_OP_QUERY_RATE_LIMIT:

	case MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT:

	case MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT:

	case MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT:

	case MLX5_CMD_OP_CREATE_QOS_PARA_VPORT:

	case MLX5_CMD_OP_ALLOC_PD:

	case MLX5_CMD_OP_ALLOC_UAR:

	case MLX5_CMD_OP_CONFIG_INT_MODERATION:
@@ -414,10 +419,7 @@ static int mlx5_internal_err_ret_value(struct mlx5_core_dev *dev, u16 op, 
	case MLX5_CMD_OP_ALLOC_FLOW_COUNTER:

	case MLX5_CMD_OP_QUERY_FLOW_COUNTER:

	case MLX5_CMD_OP_ALLOC_ENCAP_HEADER:

	case MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT:

	case MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT:

	case MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT:

	case MLX5_CMD_OP_CREATE_QOS_PARA_VPORT:

	case MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT:

		*status = MLX5_DRIVER_STATUS_ABORTED;

		*synd = MLX5_DRIVER_SYND;

		return -EIO;
@@ -501,6 +503,12 @@ const char *mlx5_command_str(int command) 
	MLX5_COMMAND_STR_CASE(QUERY_Q_COUNTER);

	MLX5_COMMAND_STR_CASE(SET_RATE_LIMIT);

	MLX5_COMMAND_STR_CASE(QUERY_RATE_LIMIT);

	MLX5_COMMAND_STR_CASE(CREATE_SCHEDULING_ELEMENT);

	MLX5_COMMAND_STR_CASE(DESTROY_SCHEDULING_ELEMENT);

	MLX5_COMMAND_STR_CASE(QUERY_SCHEDULING_ELEMENT);

	MLX5_COMMAND_STR_CASE(MODIFY_SCHEDULING_ELEMENT);

	MLX5_COMMAND_STR_CASE(CREATE_QOS_PARA_VPORT);

	MLX5_COMMAND_STR_CASE(DESTROY_QOS_PARA_VPORT);

	MLX5_COMMAND_STR_CASE(ALLOC_PD);

	MLX5_COMMAND_STR_CASE(DEALLOC_PD);

	MLX5_COMMAND_STR_CASE(ALLOC_UAR);
@@ -576,12 +584,8 @@ const char *mlx5_command_str(int command) 
	MLX5_COMMAND_STR_CASE(MODIFY_FLOW_TABLE);

	MLX5_COMMAND_STR_CASE(ALLOC_ENCAP_HEADER);

	MLX5_COMMAND_STR_CASE(DEALLOC_ENCAP_HEADER);

	MLX5_COMMAND_STR_CASE(CREATE_SCHEDULING_ELEMENT);

	MLX5_COMMAND_STR_CASE(DESTROY_SCHEDULING_ELEMENT);

	MLX5_COMMAND_STR_CASE(QUERY_SCHEDULING_ELEMENT);

	MLX5_COMMAND_STR_CASE(MODIFY_SCHEDULING_ELEMENT);

	MLX5_COMMAND_STR_CASE(CREATE_QOS_PARA_VPORT);

	MLX5_COMMAND_STR_CASE(DESTROY_QOS_PARA_VPORT);

	MLX5_COMMAND_STR_CASE(ALLOC_MODIFY_HEADER_CONTEXT);

	MLX5_COMMAND_STR_CASE(DEALLOC_MODIFY_HEADER_CONTEXT);

	default: return "unknown command opcode";

	}

}

drivers/net/ethernet/mellanox/mlx5/core/en_arfs.c

+3 −11
Original line number Diff line number Diff line
@@ -174,13 +174,9 @@ static int arfs_add_default_rule(struct mlx5e_priv *priv, 
				 enum arfs_type type)

{

	struct arfs_table *arfs_t = &priv->fs.arfs.arfs_tables[type];

	struct mlx5_flow_act flow_act = {

		.action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST,

		.flow_tag = MLX5_FS_DEFAULT_FLOW_TAG,

		.encap_id = 0,

	};

	struct mlx5_flow_destination dest;

	struct mlx5e_tir *tir = priv->indir_tir;

	struct mlx5_flow_destination dest;

	MLX5_DECLARE_FLOW_ACT(flow_act);

	struct mlx5_flow_spec *spec;

	int err = 0;
@@ -469,15 +465,11 @@ static struct arfs_table *arfs_get_table(struct mlx5e_arfs_tables *arfs, 
static struct mlx5_flow_handle *arfs_add_rule(struct mlx5e_priv *priv,

					      struct arfs_rule *arfs_rule)

{

	struct mlx5_flow_act flow_act = {

		.action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST,

		.flow_tag = MLX5_FS_DEFAULT_FLOW_TAG,

		.encap_id = 0,

	};

	struct mlx5e_arfs_tables *arfs = &priv->fs.arfs;

	struct arfs_tuple *tuple = &arfs_rule->tuple;

	struct mlx5_flow_handle *rule = NULL;

	struct mlx5_flow_destination dest;

	MLX5_DECLARE_FLOW_ACT(flow_act);

	struct arfs_table *arfs_table;

	struct mlx5_flow_spec *spec;

	struct mlx5_flow_table *ft;

drivers/net/ethernet/mellanox/mlx5/core/en_fs.c

+3 −15
Original line number Diff line number Diff line
@@ -159,14 +159,10 @@ static int __mlx5e_add_vlan_rule(struct mlx5e_priv *priv, 
				 enum mlx5e_vlan_rule_type rule_type,

				 u16 vid, struct mlx5_flow_spec *spec)

{

	struct mlx5_flow_act flow_act = {

		.action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST,

		.flow_tag = MLX5_FS_DEFAULT_FLOW_TAG,

		.encap_id = 0,

	};

	struct mlx5_flow_table *ft = priv->fs.vlan.ft.t;

	struct mlx5_flow_destination dest;

	struct mlx5_flow_handle **rule_p;

	MLX5_DECLARE_FLOW_ACT(flow_act);

	int err = 0;



	dest.type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
@@ -659,11 +655,7 @@ mlx5e_generate_ttc_rule(struct mlx5e_priv *priv, 
			u16 etype,

			u8 proto)

{

	struct mlx5_flow_act flow_act = {

		.action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST,

		.flow_tag = MLX5_FS_DEFAULT_FLOW_TAG,

		.encap_id = 0,

	};

	MLX5_DECLARE_FLOW_ACT(flow_act);

	struct mlx5_flow_handle *rule;

	struct mlx5_flow_spec *spec;

	int err = 0;
@@ -848,13 +840,9 @@ static void mlx5e_del_l2_flow_rule(struct mlx5e_priv *priv, 
static int mlx5e_add_l2_flow_rule(struct mlx5e_priv *priv,

				  struct mlx5e_l2_rule *ai, int type)

{

	struct mlx5_flow_act flow_act = {

		.action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST,

		.flow_tag = MLX5_FS_DEFAULT_FLOW_TAG,

		.encap_id = 0,

	};

	struct mlx5_flow_table *ft = priv->fs.l2.ft.t;

	struct mlx5_flow_destination dest;

	MLX5_DECLARE_FLOW_ACT(flow_act);

	struct mlx5_flow_spec *spec;

	int err = 0;

	u8 *mc_dmac;

drivers/net/ethernet/mellanox/mlx5/core/en_tc.c

+420 −53

File changed.

Preview size limit exceeded, changes collapsed.

drivers/net/ethernet/mellanox/mlx5/core/eswitch.h

+3 −2
Original line number Diff line number Diff line
@@ -285,8 +285,8 @@ enum { 
	SET_VLAN_INSERT	= BIT(1)

};



#define MLX5_FLOW_CONTEXT_ACTION_VLAN_POP  0x40

#define MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH 0x80

#define MLX5_FLOW_CONTEXT_ACTION_VLAN_POP  0x4000

#define MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH 0x8000



struct mlx5_encap_entry {

	struct hlist_node encap_hlist;
@@ -308,6 +308,7 @@ struct mlx5_esw_flow_attr { 
	u16	vlan;

	bool	vlan_handled;

	struct mlx5_encap_entry *encap;

	u32	mod_hdr_id;

};



int mlx5_eswitch_sqs2vport_start(struct mlx5_eswitch *esw,