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Commit 6bea9620 authored by John Youn's avatar John Youn Committed by Felipe Balbi
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usb: dwc2: Add functions to check the HW OTG config 



Added functions to query the GHWCFG2.OTG_MODE. This tells us whether the
controller hardware is configured for OTG, device-only, or host-only.

Signed-off-by: default avatarJohn Youn <johnyoun@synopsys.com>
Tested-by: default avatarDouglas Anderson <dianders@chromium.org>
Reviewed-by: default avatarDouglas Anderson <dianders@chromium.org>
Signed-off-by: default avatarFelipe Balbi <balbi@ti.com>
parent b5d308ab

drivers/usb/dwc2/core.c

+37 −0
Original line number Diff line number Diff line
@@ -3342,6 +3342,43 @@ void dwc2_disable_global_interrupts(struct dwc2_hsotg *hsotg) 
	dwc2_writel(ahbcfg, hsotg->regs + GAHBCFG);

}



/* Returns the controller's GHWCFG2.OTG_MODE. */

unsigned dwc2_op_mode(struct dwc2_hsotg *hsotg)

{

	u32 ghwcfg2 = dwc2_readl(hsotg->regs + GHWCFG2);



	return (ghwcfg2 & GHWCFG2_OP_MODE_MASK) >>

		GHWCFG2_OP_MODE_SHIFT;

}



/* Returns true if the controller is capable of DRD. */

bool dwc2_hw_is_otg(struct dwc2_hsotg *hsotg)

{

	unsigned op_mode = dwc2_op_mode(hsotg);



	return (op_mode == GHWCFG2_OP_MODE_HNP_SRP_CAPABLE) ||

		(op_mode == GHWCFG2_OP_MODE_SRP_ONLY_CAPABLE) ||

		(op_mode == GHWCFG2_OP_MODE_NO_HNP_SRP_CAPABLE);

}



/* Returns true if the controller is host-only. */

bool dwc2_hw_is_host(struct dwc2_hsotg *hsotg)

{

	unsigned op_mode = dwc2_op_mode(hsotg);



	return (op_mode == GHWCFG2_OP_MODE_SRP_CAPABLE_HOST) ||

		(op_mode == GHWCFG2_OP_MODE_NO_SRP_CAPABLE_HOST);

}



/* Returns true if the controller is device-only. */

bool dwc2_hw_is_device(struct dwc2_hsotg *hsotg)

{

	unsigned op_mode = dwc2_op_mode(hsotg);



	return (op_mode == GHWCFG2_OP_MODE_SRP_CAPABLE_DEVICE) ||

		(op_mode == GHWCFG2_OP_MODE_NO_SRP_CAPABLE_DEVICE);

}



MODULE_DESCRIPTION("DESIGNWARE HS OTG Core");

MODULE_AUTHOR("Synopsys, Inc.");

MODULE_LICENSE("Dual BSD/GPL");

drivers/usb/dwc2/core.h

+13 −0
Original line number Diff line number Diff line
@@ -1137,6 +1137,19 @@ extern int dwc2_get_hwparams(struct dwc2_hsotg *hsotg); 
extern int dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg);

extern int dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg);



/*

 * The following functions check the controller's OTG operation mode

 * capability (GHWCFG2.OTG_MODE).

 *

 * These functions can be used before the internal hsotg->hw_params

 * are read in and cached so they always read directly from the

 * GHWCFG2 register.

 */

unsigned dwc2_op_mode(struct dwc2_hsotg *hsotg);

bool dwc2_hw_is_otg(struct dwc2_hsotg *hsotg);

bool dwc2_hw_is_host(struct dwc2_hsotg *hsotg);

bool dwc2_hw_is_device(struct dwc2_hsotg *hsotg);



/*

 * Dump core registers and SPRAM

 */