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Commit 6bc017fd authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Correct the interconnect names node"

parents 82cd4c30 59abde71
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+58 −15
Original line number Diff line number Diff line
@@ -21,7 +21,7 @@

		qcom,chipid = <0x06060000>;

		qcom,initial-pwrlevel = <2>;
		qcom,initial-pwrlevel = <4>;

		qcom,no-nap;

@@ -34,7 +34,7 @@
		qcom,gpu-qdss-stm = <0x161c0000 0x40000>; /* base addr, size */

		interconnects = <&gem_noc MASTER_GFX3D &mc_virt SLAVE_EBI1>;
		interconntect-names = "gpu_icc_path";
		interconnect-names = "gpu_icc_path";

		qcom,bus-table-ddr7 =
			<MHZ_TO_KBPS(0, 4)>,    /* index=0  */
@@ -110,29 +110,72 @@

			qcom,gpu-pwrlevel@0 {
				reg = <0>;
				qcom,gpu-freq = <540000000>;
				qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
				qcom,bus-freq = <1>;
				qcom,bus-min = <1>;
				qcom,bus-max = <1>;
				qcom,gpu-freq = <676000000>;
				qcom,level = <RPMH_REGULATOR_LEVEL_NOM>;

				qcom,bus-freq-ddr7 = <11>;
				qcom,bus-min-ddr7 = <11>;
				qcom,bus-max-ddr7 = <11>;

				qcom,bus-freq-ddr8 = <10>;
				qcom,bus-min-ddr8 = <10>;
				qcom,bus-max-ddr8 = <10>;
			};

			qcom,gpu-pwrlevel@1 {
				reg = <1>;
				qcom,gpu-freq = <443000000>;
				qcom,level = <RPMH_REGULATOR_LEVEL_SVS>;
				qcom,bus-freq = <1>;
				qcom,bus-min = <1>;
				qcom,bus-max = <1>;
				qcom,gpu-freq = <608000000>;
				qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L2>;

				qcom,bus-freq-ddr7 = <8>;
				qcom,bus-min-ddr7 = <8>;
				qcom,bus-max-ddr7 = <11>;

				qcom,bus-freq-ddr8 = <7>;
				qcom,bus-min-ddr8 = <7>;
				qcom,bus-max-ddr8 = <10>;
			};

			qcom,gpu-pwrlevel@2 {
				reg = <2>;
				qcom,gpu-freq = <540000000>;
				qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L1>;

				qcom,bus-freq-ddr7 = <8>;
				qcom,bus-min-ddr7 = <5>;
				qcom,bus-max-ddr7 = <8>;

				qcom,bus-freq-ddr8 = <7>;
				qcom,bus-min-ddr8 = <6>;
				qcom,bus-max-ddr8 = <8>;
			};

			qcom,gpu-pwrlevel@3 {
				reg = <3>;
				qcom,gpu-freq = <443000000>;
				qcom,level = <RPMH_REGULATOR_LEVEL_SVS>;

				qcom,bus-freq-ddr7 = <6>;
				qcom,bus-min-ddr7 = <5>;
				qcom,bus-max-ddr7 = <8>;

				qcom,bus-freq-ddr8 = <7>;
				qcom,bus-min-ddr8 = <5>;
				qcom,bus-max-ddr8 = <8>;
			};

			qcom,gpu-pwrlevel@4 {
				reg = <4>;
				qcom,gpu-freq = <315000000>;
				qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
				qcom,bus-freq = <1>;
				qcom,bus-min = <1>;
				qcom,bus-max = <1>;

				qcom,bus-freq-ddr7 = <2>;
				qcom,bus-min-ddr7 = <2>;
				qcom,bus-max-ddr7 = <8>;

				qcom,bus-freq-ddr8 = <2>;
				qcom,bus-min-ddr8 = <2>;
				qcom,bus-max-ddr8 = <8>;
			};
		};
	};