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Commit 6b84cb9e authored by Wolfram Sang's avatar Wolfram Sang Committed by Greg Kroah-Hartman
Browse files

spi: sh-msiof: Enforce fixed DTDL for R-Car H3 



[ Upstream commit e5c7bcb499840551cfbe85c6df177ebc50432bf0 ]

Documentation says only DTDL of 200 is allowed for this SoC.

Fixes: 4286db84 ("spi: sh-msiof: Add R-Car Gen 2 and 3 fallback bindings")
Signed-off-by: default avatarWolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: default avatarYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://msgid.link/r/20231212081239.14254-1-wsa+renesas@sang-engineering.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent 36e19f84

drivers/spi/spi-sh-msiof.c

+17 −0
Original line number Diff line number Diff line
@@ -32,12 +32,15 @@ 


#include <asm/unaligned.h>



#define SH_MSIOF_FLAG_FIXED_DTDL_200	BIT(0)



struct sh_msiof_chipdata {

	u32 bits_per_word_mask;

	u16 tx_fifo_size;

	u16 rx_fifo_size;

	u16 ctlr_flags;

	u16 min_div_pow;

	u32 flags;

};



struct sh_msiof_spi_priv {
@@ -1072,6 +1075,16 @@ static const struct sh_msiof_chipdata rcar_gen3_data = { 
	.min_div_pow = 1,

};



static const struct sh_msiof_chipdata rcar_r8a7795_data = {

	.bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16) |

			      SPI_BPW_MASK(24) | SPI_BPW_MASK(32),

	.tx_fifo_size = 64,

	.rx_fifo_size = 64,

	.ctlr_flags = SPI_CONTROLLER_MUST_TX,

	.min_div_pow = 1,

	.flags = SH_MSIOF_FLAG_FIXED_DTDL_200,

};



static const struct of_device_id sh_msiof_match[] = {

	{ .compatible = "renesas,sh-mobile-msiof", .data = &sh_data },

	{ .compatible = "renesas,msiof-r8a7743",   .data = &rcar_gen2_data },
@@ -1082,6 +1095,7 @@ static const struct of_device_id sh_msiof_match[] = { 
	{ .compatible = "renesas,msiof-r8a7793",   .data = &rcar_gen2_data },

	{ .compatible = "renesas,msiof-r8a7794",   .data = &rcar_gen2_data },

	{ .compatible = "renesas,rcar-gen2-msiof", .data = &rcar_gen2_data },

	{ .compatible = "renesas,msiof-r8a7795",   .data = &rcar_r8a7795_data },

	{ .compatible = "renesas,msiof-r8a7796",   .data = &rcar_gen3_data },

	{ .compatible = "renesas,rcar-gen3-msiof", .data = &rcar_gen3_data },

	{ .compatible = "renesas,sh-msiof",        .data = &sh_data }, /* Deprecated */
@@ -1317,6 +1331,9 @@ static int sh_msiof_spi_probe(struct platform_device *pdev) 
		return -ENXIO;

	}



	if (chipdata->flags & SH_MSIOF_FLAG_FIXED_DTDL_200)

		info->dtdl = 200;



	if (info->mode == MSIOF_SPI_SLAVE)

		ctlr = spi_alloc_slave(&pdev->dev,

				       sizeof(struct sh_msiof_spi_priv));