Merge "disp: msm: dsi: add DSI PLL support for 10nm-LPU" into display-kernel.lnx.5.4 (6b74335f) · Commits · e / devices / android_kernel_fairphone_FP5

msm/Makefile

+1 −0

Original line number	Diff line number	Diff line
		@@ -109,6 +109,7 @@ msm_drm-$(CONFIG_DRM_MSM_DSI) += dsi/dsi_phy.o \
		dsi/dsi_phy_timing_v4_0.o \
		dsi/dsi_pll.o \
		dsi/dsi_pll_5nm.o \
		dsi/dsi_pll_10nm.o \
		dsi/dsi_ctrl_hw_cmn.o \
		dsi/dsi_ctrl_hw_1_4.o \
		dsi/dsi_ctrl_hw_2_0.o \

+6 −1

Original line number	Diff line number	Diff line
		@@ -23,6 +23,9 @@ static int dsi_pll_clock_register(struct platform_device *pdev,
		case DSI_PLL_5NM:
		rc = dsi_pll_clock_register_5nm(pdev, pll_res);
		break;
		case DSI_PLL_10NM:
		rc = dsi_pll_clock_register_10nm(pdev, pll_res);
		break;
		default:
		rc = -EINVAL;
		break;
		@@ -141,12 +144,14 @@ int dsi_pll_init(struct platform_device pdev, struct dsi_pll_resource *pll)
		DSI_PLL_INFO(pll_res, "DSI pll label = %s\n", label);

		/**
		* Currently, Only supports 5nm PLL version. Will add
		* Currently, Only supports 5nm and 10nm PLL version. Will add
		* support for other versions as needed.
		*/

		if (!strcmp(label, "dsi_pll_5nm"))
		pll_res->pll_revision = DSI_PLL_5NM;
		else if (!strcmp(label, "dsi_pll_10nm"))
		pll_res->pll_revision = DSI_PLL_10NM;
		else
		return -ENOTSUPP;

+4 −0

Original line number	Diff line number	Diff line
		@@ -54,6 +54,7 @@ struct lpfr_cfg {

		enum {
		DSI_PLL_5NM,
		DSI_PLL_10NM,
		DSI_UNKNOWN_PLL,
		};

		@@ -228,6 +229,9 @@ static inline struct dsi_pll_vco_clk to_vco_clk_hw(struct clk_hw hw)
		int dsi_pll_clock_register_5nm(struct platform_device *pdev,
		struct dsi_pll_resource *pll_res);

		int dsi_pll_clock_register_10nm(struct platform_device *pdev,
		struct dsi_pll_resource *pll_res);

		int dsi_pll_init(struct platform_device *pdev,
		struct dsi_pll_resource **pll_res);
		#endif

0 → 100644

+2074 −0

File added.

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