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Commit 6b281221 authored by Bjorn Andersson's avatar Bjorn Andersson Committed by John Stultz
Browse files

ANDROID: arm64: dts: qcom: sdm845-db845c: Bring in LT9611 



Enable MDSS and DSI and add the LT9611 HDMI bridge. DSI1 is supposedly
needed for 4k support, but is left commented out as this is yet to be
functional.

Bug: 146449535
Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: default avatarJohn Stultz <john.stultz@linaro.org>
Change-Id: I7bf2b82abeca7274f8e2dc69c592ed8303e3fbc6
parent db4a505b

arch/arm64/boot/dts/qcom/sdm845-db845c.dts

+140 −0
Original line number Diff line number Diff line
@@ -72,6 +72,17 @@ 
		};

	};



	hdmi-out {

		compatible = "hdmi-connector";

		type = "a";



		port {

			hdmi_con: endpoint {

				remote-endpoint = <&lt9611_out>;

			};

		};

	};



	lt9611_1v8: lt9611-vdd18-regulator {

		compatible = "regulator-fixed";

		regulator-name = "LT9611_1V8";
@@ -334,6 +345,53 @@ 
	firmware-name = "qcom/db845c/cdsp.mdt";

};



&dsi0 {

	status = "okay";

	vdda-supply = <&vreg_l26a_1p2>;



#if 0

	qcom,dual-dsi-mode;

	qcom,master-dsi;

#endif



	ports {

		port@1 {

			endpoint {

				remote-endpoint = <&lt9611_a>;

				data-lanes = <0 1 2 3>;

			};

		};

	};

};



&dsi0_phy {

	status = "okay";

	vdds-supply = <&vreg_l1a_0p875>;

};



#if 0

&dsi1 {

	status = "okay";

	vdda-supply = <&vreg_l26a_1p2>;



	qcom,dual-dsi-mode;



	ports {

		port@1 {

			endpoint {

				remote-endpoint = <&lt9611_b>;

				data-lanes = <0 1 2 3>;

			};

		};

	};

};



&dsi1_phy {

	status = "okay";

	vdds-supply = <&vreg_l1a_0p875>;

};

#endif



&gcc {

	protected-clocks = <GCC_QSPI_CORE_CLK>,

			   <GCC_QSPI_CORE_CLK_SRC>,
@@ -373,6 +431,65 @@ 
	vdda-pll-supply = <&vreg_l26a_1p2>;

};



&i2c10 {

	status = "okay";

	clock-frequency = <400000>;



	hdmi-bridge@3b {

		compatible = "lt,lt9611";

		reg = <0x3b>;



		interrupts-extended = <&tlmm 84 IRQ_TYPE_EDGE_FALLING>;



		reset-gpios = <&tlmm 128 GPIO_ACTIVE_HIGH>;



		vdd-supply = <&lt9611_1v8>;

		vcc-supply = <&lt9611_3v3>;



		pinctrl-names = "default";

		pinctrl-0 = <&lt9611_irq_pin>, <&dsi_sw_sel>;



		ports {

			#address-cells = <1>;

			#size-cells = <0>;



			port@0 {

				reg = <0>;



				lt9611_out: endpoint {

					remote-endpoint = <&hdmi_con>;

				};

			};



			port@1 {

				reg = <1>;



				lt9611_a: endpoint {

					remote-endpoint = <&dsi0_out>;

				};

			};



#if 0

			port@2 {

				reg = <2>;



				lt9611_b: endpoint {

					remote-endpoint = <&dsi1_out>;

				};

			};

#endif

		};

	};

};



&mdss {

	status = "okay";

};



&mdss_mdp {

	status = "okay";

};



&pm8998_gpio {

	vol_up_pin_a: vol-up-active {

		pins = "gpio6";
@@ -440,6 +557,12 @@ 
		};

	};



	lt9611_irq_pin: lt9611-irq {

		pins = "gpio84";

		function = "gpio";

		bias-disable;

	};



	pcie0_pwren_state: pcie0-pwren {

		pins = "gpio90";

		function = "gpio";
@@ -511,6 +634,15 @@ 
		function = "gpio";

		bias-pull-up;

	};



	dsi_sw_sel: dsi-sw-sel {

		pins = "gpio120";

		function = "gpio";



		drive-strength = <2>;

		bias-disable;

		output-high;

	};

};



&uart6 {
@@ -612,6 +744,14 @@ 


/* PINCTRL - additions to nodes defined in sdm845.dtsi */



&qup_i2c10_default {

	pinconf {

		pins = "gpio55", "gpio56";

		drive-strength = <2>;

		bias-disable;

	};

};



&qup_uart6_default {

	pinmux {

		pins = "gpio45", "gpio46", "gpio47", "gpio48";