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Commit 6b241e41 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'net-aquantia-add-RSS-configuration' 



Igor Russkikh says:

====================
net: aquantia: add RSS configuration

In this patchset few bugs related to RSS are fixed and RSS table and
hash key configuration is added.

We also do increase max number of HW rings upto 8.

v2: removed extra arg check
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents ef2df7fc 39163767

drivers/net/ethernet/aquantia/atlantic/aq_cfg.h

+3 −3
Original line number Diff line number Diff line
@@ -12,7 +12,7 @@ 
#ifndef AQ_CFG_H

#define AQ_CFG_H



#define AQ_CFG_VECS_DEF   4U

#define AQ_CFG_VECS_DEF   8U

#define AQ_CFG_TCS_DEF    1U



#define AQ_CFG_TXDS_DEF    4096U
@@ -42,8 +42,8 @@ 
#define AQ_CFG_IS_LRO_DEF           1U



/* RSS */

#define AQ_CFG_RSS_INDIRECTION_TABLE_MAX  128U

#define AQ_CFG_RSS_HASHKEY_SIZE           320U

#define AQ_CFG_RSS_INDIRECTION_TABLE_MAX  64U

#define AQ_CFG_RSS_HASHKEY_SIZE           40U



#define AQ_CFG_IS_RSS_DEF           1U

#define AQ_CFG_NUM_RSS_QUEUES_DEF   AQ_CFG_VECS_DEF

drivers/net/ethernet/aquantia/atlantic/aq_ethtool.c

+36 −0
Original line number Diff line number Diff line
@@ -202,6 +202,41 @@ static int aq_ethtool_get_rss(struct net_device *ndev, u32 *indir, u8 *key, 
	return 0;

}



static int aq_ethtool_set_rss(struct net_device *netdev, const u32 *indir,

			      const u8 *key, const u8 hfunc)

{

	struct aq_nic_s *aq_nic = netdev_priv(netdev);

	struct aq_nic_cfg_s *cfg;

	unsigned int i = 0U;

	u32 rss_entries;

	int err = 0;



	cfg = aq_nic_get_cfg(aq_nic);

	rss_entries = cfg->aq_rss.indirection_table_size;



	/* We do not allow change in unsupported parameters */

	if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP)

		return -EOPNOTSUPP;

	/* Fill out the redirection table */

	if (indir)

		for (i = 0; i < rss_entries; i++)

			cfg->aq_rss.indirection_table[i] = indir[i];



	/* Fill out the rss hash key */

	if (key) {

		memcpy(cfg->aq_rss.hash_secret_key, key,

		       sizeof(cfg->aq_rss.hash_secret_key));

		err = aq_nic->aq_hw_ops->hw_rss_hash_set(aq_nic->aq_hw,

			&cfg->aq_rss);

		if (err)

			return err;

	}



	err = aq_nic->aq_hw_ops->hw_rss_set(aq_nic->aq_hw, &cfg->aq_rss);



	return err;

}



static int aq_ethtool_get_rxnfc(struct net_device *ndev,

				struct ethtool_rxnfc *cmd,

				u32 *rule_locs)
@@ -549,6 +584,7 @@ const struct ethtool_ops aq_ethtool_ops = { 
	.set_pauseparam      = aq_ethtool_set_pauseparam,

	.get_rxfh_key_size   = aq_ethtool_get_rss_key_size,

	.get_rxfh            = aq_ethtool_get_rss,

	.set_rxfh            = aq_ethtool_set_rss,

	.get_rxnfc           = aq_ethtool_get_rxnfc,

	.set_rxnfc           = aq_ethtool_set_rxnfc,

	.get_sset_count      = aq_ethtool_get_sset_count,

drivers/net/ethernet/aquantia/atlantic/aq_nic.c

+3 −3
Original line number Diff line number Diff line
@@ -44,7 +44,7 @@ static void aq_nic_rss_init(struct aq_nic_s *self, unsigned int num_rss_queues) 
	struct aq_rss_parameters *rss_params = &cfg->aq_rss;

	int i = 0;



	static u8 rss_key[40] = {

	static u8 rss_key[AQ_CFG_RSS_HASHKEY_SIZE] = {

		0x1e, 0xad, 0x71, 0x87, 0x65, 0xfc, 0x26, 0x7d,

		0x0d, 0x45, 0x67, 0x74, 0xcd, 0x06, 0x1a, 0x18,

		0xb6, 0xc1, 0xf0, 0xc7, 0xbb, 0x18, 0xbe, 0xf8,
@@ -84,8 +84,6 @@ void aq_nic_cfg_start(struct aq_nic_s *self) 


	cfg->is_lro = AQ_CFG_IS_LRO_DEF;



	aq_nic_rss_init(self, cfg->num_rss_queues);



	/*descriptors */

	cfg->rxds = min(cfg->aq_hw_caps->rxds_max, AQ_CFG_RXDS_DEF);

	cfg->txds = min(cfg->aq_hw_caps->txds_max, AQ_CFG_TXDS_DEF);
@@ -106,6 +104,8 @@ void aq_nic_cfg_start(struct aq_nic_s *self) 


	cfg->num_rss_queues = min(cfg->vecs, AQ_CFG_NUM_RSS_QUEUES_DEF);



	aq_nic_rss_init(self, cfg->num_rss_queues);



	cfg->irq_type = aq_pci_func_get_irq_type(self);



	if ((cfg->irq_type == AQ_HW_IRQ_LEGACY) ||

drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c

+1 −1
Original line number Diff line number Diff line
@@ -21,7 +21,7 @@ 


#define DEFAULT_B0_BOARD_BASIC_CAPABILITIES \

	.is_64_dma = true,		  \

	.msix_irqs = 4U,		  \

	.msix_irqs = 8U,		  \

	.irq_mask = ~0U,		  \

	.vecs = HW_ATL_B0_RSS_MAX,	  \

	.tcs = HW_ATL_B0_TC_MAX,	  \