Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 6ac5310e authored by Ralf Baechle's avatar Ralf Baechle
Browse files

Merge branch '3.10-fixes' into mips-for-linux-next 

This that should have been fixed but weren't, way to much, intrusive
and late.
parents 704e6460 3f90b82d

arch/mips/Kconfig

+0 −1
Original line number Diff line number Diff line
@@ -420,7 +420,6 @@ config POWERTV 
	select CSRC_POWERTV

	select DMA_NONCOHERENT

	select HW_HAS_PCI

	select SYS_HAS_EARLY_PRINTK

	select SYS_HAS_CPU_MIPS32_R2

	select SYS_SUPPORTS_32BIT_KERNEL

	select SYS_SUPPORTS_BIG_ENDIAN

arch/mips/ath79/mach-ap136.c

+1 −1
Original line number Diff line number Diff line
@@ -132,7 +132,7 @@ static void __init ap136_pci_init(u8 *eeprom) 
	ath79_register_pci();

}

#else

static inline void ap136_pci_init(void) {}

static inline void ap136_pci_init(u8 *eeprom) {}

#endif /* CONFIG_PCI */



static void __init ap136_setup(void)

arch/mips/bcm63xx/Kconfig

+0 −5
Original line number Diff line number Diff line
@@ -12,14 +12,9 @@ config BCM63XX_CPU_6328 
config BCM63XX_CPU_6338

	bool "support 6338 CPU"

	select HW_HAS_PCI

	select USB_ARCH_HAS_OHCI

	select USB_OHCI_BIG_ENDIAN_DESC

	select USB_OHCI_BIG_ENDIAN_MMIO



config BCM63XX_CPU_6345

	bool "support 6345 CPU"

	select USB_OHCI_BIG_ENDIAN_DESC

	select USB_OHCI_BIG_ENDIAN_MMIO



config BCM63XX_CPU_6348

	bool "support 6348 CPU"

arch/mips/cavium-octeon/Makefile

+2 −1
Original line number Diff line number Diff line
@@ -13,10 +13,11 @@ CFLAGS_octeon-platform.o = -I$(src)/../../../scripts/dtc/libfdt 
CFLAGS_setup.o = -I$(src)/../../../scripts/dtc/libfdt



obj-y := cpu.o setup.o octeon-platform.o octeon-irq.o csrc-octeon.o

obj-y += dma-octeon.o flash_setup.o

obj-y += dma-octeon.o

obj-y += octeon-memcpy.o

obj-y += executive/



obj-$(CONFIG_MTD)		      += flash_setup.o

obj-$(CONFIG_SMP)		      += smp.o

obj-$(CONFIG_OCTEON_ILM)	      += oct_ilm.o

arch/mips/cavium-octeon/setup.c

+3 −2
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ 
 * Copyright (C) 2008, 2009 Wind River Systems

 *   written by Ralf Baechle <ralf@linux-mips.org>

 */

#include <linux/compiler.h>

#include <linux/init.h>

#include <linux/kernel.h>

#include <linux/console.h>
@@ -694,7 +695,7 @@ void __init prom_init(void) 
	if (cvmx_read_csr(CVMX_L2D_FUS3) & (3ull << 34)) {

		pr_info("Skipping L2 locking due to reduced L2 cache size\n");

	} else {

		uint32_t ebase = read_c0_ebase() & 0x3ffff000;

		uint32_t __maybe_unused ebase = read_c0_ebase() & 0x3ffff000;

#ifdef CONFIG_CAVIUM_OCTEON_LOCK_L2_TLB

		/* TLB refill */

		cvmx_l2c_lock_mem_region(ebase, 0x100);
@@ -978,7 +979,7 @@ void __init plat_mem_setup(void) 
	cvmx_bootmem_unlock();

	/* Add the memory region for the kernel. */

	kernel_start = (unsigned long) _text;

	kernel_size = ALIGN(_end - _text, 0x100000);

	kernel_size = _end - _text;



	/* Adjust for physical offset. */

	kernel_start &= ~0xffffffff80000000ULL;