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Commit 6aaa1e8e authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Add bindings for llcc tcm"

parents 927ea7aa 390b3f3f
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+6 −0
Original line number Diff line number Diff line
@@ -47,6 +47,12 @@ Properties:
	Definition: List of clock input name strings sorted in the same
		    order as the clocks property. Definition must have
		    "qdss_clk"

- memory-region:
	Usage: optional
	Value type: <prop-encoded-array>
	Definition: List of memory regions which define the range of addresses used
		    for tightly coupled memory in the llcc.
Example:

	cache-controller@1100000 {
+14 −0
Original line number Diff line number Diff line
@@ -76,6 +76,19 @@
			reusable;
			size = <0x400000>;
		};

		cnss_wlan_mem: cnss_wlan_region {
			compatible = "shared-dma-pool";
			alloc-ranges = <0x00000000 0xffffffff>;
			reusable;
			alignment = <0x400000>;
			size = <0x1400000>;
		};

		llcc_tcm_mem: llcc_tcm_region {
			no-map;
			reg = <0x15800000 0x800000>;
		};
	};

	cpus {
@@ -704,6 +717,7 @@
		cap-based-alloc-and-pwr-collapse;
		clocks = <&aopcc QDSS_CLK>;
		clock-names = "aopcc_closks";
		memory-region = <&llcc_tcm_mem>;
	};

	smem: qcom,smem {