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Commit 6a0694b6 authored by Florian Eckert's avatar Florian Eckert Committed by Andy Shevchenko
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platform/x86: pcengines-apuv2: add mpcie reset gpio export 



On APUx we have also mpcie2/mpcie3 reset pins. To make it possible to reset
the ports from the userspace, add the definition to this platform
device. The gpio can then be exported by the legancy gpio subsystem to
toggle the mpcie reset pin.

Signed-off-by: default avatarFlorian Eckert <fe@dev.tdt.de>
Acked-by: default avatarEnrico Weigelt <info@metux.net>
Signed-off-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
parent c03f282e

drivers/platform/x86/pcengines-apuv2.c

+8 −0
Original line number Diff line number Diff line
@@ -32,6 +32,8 @@ 
#define APU2_GPIO_REG_LED3		AMD_FCH_GPIO_REG_GPIO59_DEVSLP1

#define APU2_GPIO_REG_MODESW		AMD_FCH_GPIO_REG_GPIO32_GE1

#define APU2_GPIO_REG_SIMSWAP		AMD_FCH_GPIO_REG_GPIO33_GE2

#define APU2_GPIO_REG_MPCIE2		AMD_FCH_GPIO_REG_GPIO59_DEVSLP0

#define APU2_GPIO_REG_MPCIE3		AMD_FCH_GPIO_REG_GPIO51



/* order in which the gpio lines are defined in the register list */

#define APU2_GPIO_LINE_LED1		0
@@ -39,6 +41,8 @@ 
#define APU2_GPIO_LINE_LED3		2

#define APU2_GPIO_LINE_MODESW		3

#define APU2_GPIO_LINE_SIMSWAP		4

#define APU2_GPIO_LINE_MPCIE2		5

#define APU2_GPIO_LINE_MPCIE3		6



/* gpio device */
@@ -48,6 +52,8 @@ static int apu2_gpio_regs[] = { 
	[APU2_GPIO_LINE_LED3]		= APU2_GPIO_REG_LED3,

	[APU2_GPIO_LINE_MODESW]		= APU2_GPIO_REG_MODESW,

	[APU2_GPIO_LINE_SIMSWAP]	= APU2_GPIO_REG_SIMSWAP,

	[APU2_GPIO_LINE_MPCIE2]		= APU2_GPIO_REG_MPCIE2,

	[APU2_GPIO_LINE_MPCIE3]		= APU2_GPIO_REG_MPCIE3,

};



static const char * const apu2_gpio_names[] = {
@@ -56,6 +62,8 @@ static const char * const apu2_gpio_names[] = { 
	[APU2_GPIO_LINE_LED3]		= "front-led3",

	[APU2_GPIO_LINE_MODESW]		= "front-button",

	[APU2_GPIO_LINE_SIMSWAP]	= "simswap",

	[APU2_GPIO_LINE_MPCIE2]		= "mpcie2_reset",

	[APU2_GPIO_LINE_MPCIE3]		= "mpcie3_reset",

};



static const struct amd_fch_gpio_pdata board_apu2 = {