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Commit 69b51bbb authored by Shiju Jose's avatar Shiju Jose Committed by David S. Miller
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net: hns3: fix to stop multiple HNS reset due to the AER changes 



The commit bfcb79fc
("PCI/ERR: Run error recovery callbacks for all affected devices")
affected the non-fatal error recovery logic for the HNS and RDMA devices.
This is because each HNS PF under PCIe bus receive callbacks
from the AER driver when an error is reported for one of the PF.
This causes unwanted PF resets because
the HNS decides which PF to reset based on the reset type set.
The HNS error handling code sets the reset type based on the hw error
type detected.

This patch provides fix for the above issue for the recovery of
the hw errors in the HNS and RDMA devices.

This patch needs backporting to the kernel v5.0+

Fixes: 332fbf57 ("net: hns3: add handling of hw ras errors using new set of commands")
Reported-by: default avatarXiaofei Tan <tanxiaofei@huawei.com>
Signed-off-by: default avatarShiju Jose <shiju.jose@huawei.com>
Signed-off-by: default avatarHuazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 083b78a9

drivers/net/ethernet/hisilicon/hns3/hnae3.h

+1 −0
Original line number Diff line number Diff line
@@ -194,6 +194,7 @@ struct hnae3_ae_dev { 
	const struct hnae3_ae_ops *ops;

	struct list_head node;

	u32 flag;

	u8 override_pci_need_reset; /* fix to stop multiple reset happening */

	enum hnae3_dev_type dev_type;

	enum hnae3_reset_type reset_type;

	void *priv;

drivers/net/ethernet/hisilicon/hns3/hns3_enet.c

+3 −1
Original line number Diff line number Diff line
@@ -1850,7 +1850,9 @@ static pci_ers_result_t hns3_slot_reset(struct pci_dev *pdev) 


	/* request the reset */

	if (ae_dev->ops->reset_event) {

		if (!ae_dev->override_pci_need_reset)

			ae_dev->ops->reset_event(pdev, NULL);



		return PCI_ERS_RESULT_RECOVERED;

	}

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c

+7 −2
Original line number Diff line number Diff line
@@ -1317,9 +1317,11 @@ pci_ers_result_t hclge_handle_hw_ras_error(struct hnae3_ae_dev *ae_dev) 
		hclge_handle_all_ras_errors(hdev);

	} else {

		if (test_bit(HCLGE_STATE_RST_HANDLING, &hdev->state) ||

		    hdev->pdev->revision < 0x21)

		    hdev->pdev->revision < 0x21) {

			ae_dev->override_pci_need_reset = 1;

			return PCI_ERS_RESULT_RECOVERED;

		}

	}



	if (status & HCLGE_RAS_REG_ROCEE_ERR_MASK) {

		dev_warn(dev, "ROCEE uncorrected RAS error identified\n");
@@ -1327,8 +1329,11 @@ pci_ers_result_t hclge_handle_hw_ras_error(struct hnae3_ae_dev *ae_dev) 
	}



	if (status & HCLGE_RAS_REG_NFE_MASK ||

	    status & HCLGE_RAS_REG_ROCEE_ERR_MASK)

	    status & HCLGE_RAS_REG_ROCEE_ERR_MASK) {

		ae_dev->override_pci_need_reset = 0;

		return PCI_ERS_RESULT_NEED_RESET;

	}

	ae_dev->override_pci_need_reset = 1;



	return PCI_ERS_RESULT_RECOVERED;

}