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Commit 695c0712 authored by Ritesh Kumar's avatar Ritesh Kumar
Browse files

ARM: dts: msm: Add 60Hz command mode support on shima 

This change Add 60Hz command mode panel support on shima
idp platform.

Change-Id: I15a258debfee22c6a1eed29daf090ddedddd39d7
parent d3894dac

display/dsi-panel-r66451-dsc-fhd-plus-60hz-cmd.dtsi

0 → 100644
+95 −0
Original line number Diff line number Diff line 
&mdss_mdp {

	dsi_r66451_amoled_60hz_cmd: qcom,mdss_dsi_visionox_r66451_fhd_plus_60hz_cmd {

		qcom,mdss-dsi-panel-name =

			"r66451 amoled cmd mode dsi visionox 60HZ panel with DSC";

		qcom,mdss-dsi-panel-type = "dsi_cmd_mode";

		qcom,mdss-dsi-panel-physical-type = "oled";

		qcom,mdss-dsi-virtual-channel-id = <0>;

		qcom,mdss-dsi-stream = <0>;

		qcom,mdss-dsi-bpp = <24>;

		qcom,mdss-dsi-color-order = "rgb_swap_rgb";

		qcom,mdss-dsi-underflow-color = <0xff>;

		qcom,mdss-dsi-border-color = <0>;



		qcom,dsi-ctrl-num = <0>;

		qcom,dsi-phy-num = <0>;



		qcom,mdss-dsi-traffic-mode = "non_burst_sync_event";

		qcom,mdss-dsi-lane-map = "lane_map_0123";

		qcom,mdss-dsi-bllp-eof-power-mode;

		qcom,mdss-dsi-bllp-power-mode;

		qcom,mdss-dsi-lane-0-state;

		qcom,mdss-dsi-lane-1-state;

		qcom,mdss-dsi-lane-2-state;

		qcom,mdss-dsi-lane-3-state;

		qcom,mdss-dsi-dma-trigger = "trigger_sw";

		qcom,mdss-dsi-mdp-trigger = "none";

		qcom,mdss-dsi-reset-sequence = <1 20>, <0 10>, <1 20>;



		qcom,mdss-dsi-te-pin-select = <1>;

		qcom,mdss-dsi-wr-mem-start = <0x2c>;

		qcom,mdss-dsi-wr-mem-continue = <0x3c>;

		qcom,mdss-dsi-te-dcs-command = <1>;

		qcom,mdss-dsi-te-check-enable;

		qcom,mdss-dsi-te-using-te-pin;

		qcom,mdss-dsi-display-timings {

			timing@0 {

				qcom,mdss-dsi-panel-framerate = <60>;

				qcom,mdss-dsi-panel-width = <1080>;

				qcom,mdss-dsi-panel-height = <2340>;

				qcom,mdss-dsi-h-front-porch = <95>;

				qcom,mdss-dsi-h-back-porch = <40>;

				qcom,mdss-dsi-h-pulse-width = <1>;

				qcom,mdss-dsi-h-sync-skew = <0>;

				qcom,mdss-dsi-v-back-porch = <4>;

				qcom,mdss-dsi-v-front-porch = <25>;

				qcom,mdss-dsi-v-pulse-width = <1>;

				qcom,mdss-dsi-h-left-border = <0>;

				qcom,mdss-dsi-h-right-border = <0>;

				qcom,mdss-dsi-v-top-border = <0>;

				qcom,mdss-dsi-v-bottom-border = <0>;

				qcom,mdss-dsi-panel-jitter = <0x4 0x1>;

				qcom,mdss-dsi-on-command = [

					39 01 00 00 00 00 02 b0 00

					39 01 00 00 00 00 13 d8 00 00 00 00 00

					   00 00 00 00 5b 00 5b 00 5b 00 5b 00

					   5b

					39 01 00 00 00 00 02 b0 80

					39 01 00 00 00 00 02 e6 00

					39 01 00 00 00 00 02 b0 00

					39 01 00 00 00 00 19 cf 64 0b 00 00 00

					   00 00 00 08 00 0b 77 01 01 01 01 01

					   01 04 04 04 04 04 05

					39 01 00 00 00 00 02 b0 04

					39 01 00 00 00 00 02 f7 01

					39 01 00 00 00 00 03 df 50 40

					39 01 00 00 00 00 06 f3 50 00 00 00 00

					39 01 00 00 00 00 02 f2 11

					39 01 00 00 00 00 06 f3 01 00 00 00 01

					39 01 00 00 00 00 03 f4 00 02

					39 01 00 00 00 00 02 f2 19

					39 01 00 00 00 00 03 df 50 42

					39 01 00 00 00 00 02 35 00

					39 01 00 00 00 00 05 2a 00 00 04 37

					39 01 00 00 00 00 05 2b 00 00 09 23

					05 01 00 00 78 00 01 11

					05 01 00 00 00 00 01 29

				];



				qcom,mdss-dsi-off-command = [

					05 01 00 00 14 00 02 28 00

					05 01 00 00 78 00 02 10 00];

				qcom,mdss-dsi-on-command-state = "dsi_lp_mode";

				qcom,mdss-dsi-off-command-state = "dsi_hs_mode";

				qcom,mdss-dsi-h-sync-pulse = <0>;

				qcom,compression-mode = "dsc";

				qcom,mdss-dsc-slice-height = <20>;

				qcom,mdss-dsc-slice-width = <540>;

				qcom,mdss-dsc-slice-per-pkt = <1>;

				qcom,mdss-dsc-bit-per-component = <8>;

				qcom,mdss-dsc-bit-per-pixel = <8>;

				qcom,mdss-dsc-block-prediction-enable;

			};

		};

	};

};

display/shima-sde-display-common.dtsi

+13 −0
Original line number Diff line number Diff line 
#include "dsi-panel-r66451-dsc-fhd-plus-video.dtsi"

#include "dsi-panel-r66451-dsc-fhd-plus-60hz-video.dtsi"

#include "dsi-panel-r66451-dsc-fhd-plus-cmd.dtsi"

#include "dsi-panel-r66451-dsc-fhd-plus-60hz-cmd.dtsi"

#include "dsi-panel-sim-video.dtsi"

#include <dt-bindings/clock/mdss-5nm-pll-clk.h>
@@ -99,6 +100,18 @@ 
	};

};



&dsi_r66451_amoled_60hz_cmd {

	qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";

	qcom,mdss-dsi-display-timings {

		timing@0 {

			qcom,mdss-dsi-panel-phy-timings = [00 0e 03 03 1e 1d 04

				03 03 02 04 00 0f 13];

			qcom,display-topology = <2 2 1>;

			qcom,default-topology-index = <0>;

		};

	};

};



&dsi_r66451_amoled_cmd {

	qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";

	qcom,dsi-select-sec-clocks = "mux_byte_clk1", "mux_pixel_clk1";

display/shima-sde-display-idp.dtsi

+11 −0
Original line number Diff line number Diff line
@@ -20,6 +20,17 @@ 
	qcom,platform-reset-gpio = <&tlmm 24 0>;

};



&dsi_r66451_amoled_60hz_cmd {

	qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;

	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";

	qcom,mdss-dsi-bl-min-level = <1>;

	qcom,mdss-dsi-bl-max-level = <4095>;

	qcom,mdss-brightness-max-level = <255>;

	qcom,mdss-dsi-bl-inverted-dbv;

	qcom,platform-te-gpio = <&tlmm 82 0>;

	qcom,platform-reset-gpio = <&tlmm 24 0>;

};



&dsi_r66451_amoled_cmd {

	qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;

	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";

display/shima-sde-display.dtsi

+9 −0
Original line number Diff line number Diff line
@@ -96,6 +96,15 @@ 
	qcom,mdss-dsi-panel-status-read-length = <1>;

};



&dsi_r66451_amoled_60hz_cmd {

	qcom,esd-check-enabled;

	qcom,mdss-dsi-panel-status-check-mode = "reg_read";

	qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];

	qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode";

	qcom,mdss-dsi-panel-status-value = <0x1c>;

	qcom,mdss-dsi-panel-status-read-length = <1>;

};



&dsi_r66451_amoled_cmd {

	qcom,esd-check-enabled;

	qcom,mdss-dsi-panel-status-check-mode = "reg_read";