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Commit 68cc5a6b authored by Raghavendra Rao Ananta's avatar Raghavendra Rao Ananta
Browse files

pinctrl: qcom: Correctly configure the SDC2 pins 



When the commit <9c6fe1f3> (pinctrl: qcom: Expose ufs_reset as
gpio on Lahaina) tried to reconfigure the pins, it missed to setup the
PINCTRL_PIN() entries for the same. Hence, reorder the pin numbers for
proper functionality of the pins.

Change-Id: Ia48156a7b0b86fc9ccaa1ddabbac7d5e1a04f37b
Signed-off-by: default avatarRaghavendra Rao Ananta <rananta@codeaurora.org>
parent df1e8abb

drivers/pinctrl/qcom/pinctrl-lahaina.c

+5 −5
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only

/*

 * Copyright (c) 2019, The Linux Foundation. All rights reserved.

 * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.

 */



#include <linux/module.h>
@@ -328,10 +328,10 @@ static const struct pinctrl_pin_desc lahaina_pins[] = { 
	PINCTRL_PIN(200, "GPIO_200"),

	PINCTRL_PIN(201, "GPIO_201"),

	PINCTRL_PIN(202, "GPIO_202"),

	PINCTRL_PIN(203, "SDC2_CLK"),

	PINCTRL_PIN(204, "SDC2_CMD"),

	PINCTRL_PIN(205, "SDC2_DATA"),

	PINCTRL_PIN(206, "UFS_RESET"),

	PINCTRL_PIN(203, "UFS_RESET"),

	PINCTRL_PIN(204, "SDC2_CLK"),

	PINCTRL_PIN(205, "SDC2_CMD"),

	PINCTRL_PIN(206, "SDC2_DATA"),

};



#define DECLARE_MSM_GPIO_PINS(pin) \