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Commit 689692e7 authored by Thomas Hellstrom's avatar Thomas Hellstrom Committed by Dave Airlie
Browse files

via: add some new chipsets 



Disable 3D functionality and AGP DMA for chipsets with the DX9 3D engine.

Signed-off-by: default avatarDave Airlie <airlied@linux.ie>
parent 76f62551

drivers/char/drm/drm_pciids.h

+3 −1
Original line number Diff line number Diff line
@@ -226,12 +226,14 @@ 
	{0x1106, 0x3022, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \

	{0x1106, 0x3118, PCI_ANY_ID, PCI_ANY_ID, 0, 0, VIA_PRO_GROUP_A}, \

	{0x1106, 0x3122, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \

	{0x1106, 0x7204, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \

	{0x1106, 0x7205, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \

	{0x1106, 0x3108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \

	{0x1106, 0x3304, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \

	{0x1106, 0x3157, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \

	{0x1106, 0x3344, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \

	{0x1106, 0x7204, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \

	{0x1106, 0x3343, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \

	{0x1106, 0x3230, PCI_ANY_ID, PCI_ANY_ID, 0, 0, VIA_DX9_0}, \

	{0, 0, 0}



#define i810_PCI_IDS \

drivers/char/drm/via_drv.h

+4 −3
Original line number Diff line number Diff line
@@ -79,7 +79,7 @@ typedef struct drm_via_private { 
	char pci_buf[VIA_PCI_BUF_SIZE];

	const uint32_t *fire_offsets[VIA_FIRE_BUF_SIZE];

	uint32_t num_fire_offsets;

	int pro_group_a;

	int chipset;

	drm_via_irq_t via_irqs[VIA_NUM_IRQS];

	unsigned num_irqs;

	maskarray_t *irq_masks;
@@ -96,8 +96,9 @@ typedef struct drm_via_private { 
} drm_via_private_t;



enum via_family {

	VIA_OTHER = 0,

	VIA_PRO_GROUP_A,

  VIA_OTHER = 0,     /* Baseline */

  VIA_PRO_GROUP_A,   /* Another video engine and DMA commands */

  VIA_DX9_0          /* Same video as pro_group_a, but 3D is unsupported */

};



/* VIA MMIO register access */

drivers/char/drm/via_irq.c

+10 −6
Original line number Diff line number Diff line
@@ -258,12 +258,16 @@ void via_driver_irq_preinstall(drm_device_t * dev) 
		dev_priv->irq_enable_mask = VIA_IRQ_VBLANK_ENABLE;

		dev_priv->irq_pending_mask = VIA_IRQ_VBLANK_PENDING;



		dev_priv->irq_masks = (dev_priv->pro_group_a) ?

		    via_pro_group_a_irqs : via_unichrome_irqs;

		dev_priv->num_irqs = (dev_priv->pro_group_a) ?

		    via_num_pro_group_a : via_num_unichrome;

		dev_priv->irq_map = (dev_priv->pro_group_a) ?

			via_irqmap_pro_group_a : via_irqmap_unichrome;

		if (dev_priv->chipset == VIA_PRO_GROUP_A ||

		    dev_priv->chipset == VIA_DX9_0) {

			dev_priv->irq_masks = via_pro_group_a_irqs;

			dev_priv->num_irqs = via_num_pro_group_a;

			dev_priv->irq_map = via_irqmap_pro_group_a;

		} else {

			dev_priv->irq_masks = via_unichrome_irqs;

			dev_priv->num_irqs = via_num_unichrome;

			dev_priv->irq_map = via_irqmap_unichrome;

		}



		for (i = 0; i < dev_priv->num_irqs; ++i) {

			atomic_set(&cur_irq->irq_received, 0);

drivers/char/drm/via_map.c

+1 −2
Original line number Diff line number Diff line
@@ -106,8 +106,7 @@ int via_driver_load(drm_device_t *dev, unsigned long chipset) 


	dev->dev_private = (void *)dev_priv;



	if (chipset == VIA_PRO_GROUP_A)

		dev_priv->pro_group_a = 1;

	dev_priv->chipset = chipset;



	ret = drm_sman_init(&dev_priv->sman, 2, 12, 8);

	if (ret) {

drivers/char/drm/via_verifier.c

+15 −5
Original line number Diff line number Diff line
@@ -961,7 +961,13 @@ via_verify_command_stream(const uint32_t * buf, unsigned int size, 
	uint32_t cmd;

	const uint32_t *buf_end = buf + (size >> 2);

	verifier_state_t state = state_command;

	int pro_group_a = dev_priv->pro_group_a;

	int cme_video;

	int supported_3d;



	cme_video = (dev_priv->chipset == VIA_PRO_GROUP_A ||

		     dev_priv->chipset == VIA_DX9_0);



	supported_3d = dev_priv->chipset != VIA_DX9_0;



	hc_state->dev = dev;

	hc_state->unfinished = no_sequence;
@@ -986,17 +992,21 @@ via_verify_command_stream(const uint32_t * buf, unsigned int size, 
			state = via_check_vheader6(&buf, buf_end);

			break;

		case state_command:

			if (HALCYON_HEADER2 == (cmd = *buf))

			if ((HALCYON_HEADER2 == (cmd = *buf)) &&

			    supported_3d)

				state = state_header2;

			else if ((cmd & HALCYON_HEADER1MASK) == HALCYON_HEADER1)

				state = state_header1;

			else if (pro_group_a

			else if (cme_video

				 && (cmd & VIA_VIDEOMASK) == VIA_VIDEO_HEADER5)

				state = state_vheader5;

			else if (pro_group_a

			else if (cme_video

				 && (cmd & VIA_VIDEOMASK) == VIA_VIDEO_HEADER6)

				state = state_vheader6;

			else {

			else if ((cmd == HALCYON_HEADER2) && !supported_3d) {

				DRM_ERROR("Accelerated 3D is not supported on this chipset yet.\n");

				state = state_error;

			} else {

				DRM_ERROR

				    ("Invalid / Unimplemented DMA HEADER command. 0x%x\n",

				     cmd);