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Commit 67db596c authored by Jigarkumar Zala's avatar Jigarkumar Zala Committed by Mukund Madhusudan Atre
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dt-bindings: Adding capability for scalable clock

Adding scalable clock support for vfe node.

Change-Id: Iedcd21446a75d8b59221d6d9f572d3613855fccb
parent a6eb11c8
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+8 −0
Original line number Diff line number Diff line
@@ -107,6 +107,12 @@ Optional properties:
	frequencies to limit CX peak current.
	driver in the relevant register.

- scl-clk-names:
  Usage: optional
  Value type: <string>
  Definition: Scalable clock names to identify which clocks needs to update
	along with source clock.

Example:
	qcom,vfe0@acaf000 {
		cell-index = <0>;
@@ -141,6 +147,8 @@ Example:
		clock-names-option = "ife_dsp_clk";
		clocks-option = <&clock_camcc CAM_CC_IFE_0_DSP_CLK>;
		clock-rates-option = <600000000>;
		scl-clk-en;
		scl-clk-names = "ife_axi_clk";
		qcom,cam-cx-ipeak = <&cx_ipeak_lm 2>;
		status = "ok";
	};