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Commit 67d83776 authored Aug 25, 2020 by qctecmdr Committed by Gerrit - the friendly Code Review server Aug 25, 2020

Merge "ARM: dts: msm: Update PCIe0 PHY settings to v1.00 for lahaina v1"

parents db4b1b4b 39a14e47

qcom/lahaina-pcie.dtsi

+2 −1

Original line number	Diff line number	Diff line
		@@ -110,7 +110,7 @@
		qcom,slv-addr-space-size = <0x4000000>;
		qcom,ep-latency = <10>;

		qcom,pcie-phy-ver = <10099>;
		qcom,pcie-phy-ver = <10100>;
		qcom,phy-status-offset = <0x214>;
		qcom,phy-status-bit = <6>;
		qcom,phy-power-down-offset = <0x240>;
		@@ -177,6 +177,7 @@
		0x1050 0x08 0x0
		0x1044 0xf0 0x0
		0x11a4 0x38 0x0
		0x10cc 0xf0 0x0
		0x0694 0x00 0x0
		0x0654 0x00 0x0
		0x06a8 0x0f 0x0