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Commit 67ad058d authored by Linus Torvalds's avatar Linus Torvalds
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Merge tag 'tty-4.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty 

Pull tty/serial updates from Greg KH:
 "Here is the big serial/tty driver update for 4.5-rc1.

  Lots of driver updates and some tty core changes.  All of these have
  been in linux-next and the details are in the shortlog"

* tag 'tty-4.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (127 commits)
  drivers/tty/serial: delete unused MODULE_DEVICE_TABLE from atmel_serial.c
  serial: sh-sci: Remove cpufreq notifier to fix crash/deadlock
  serial: 8250: of: Fix the driver and actually compile the 8250_of
  tty: amba-pl011: use iotype instead of access_32b to track 32-bit I/O
  tty: amba-pl011: fix earlycon register offsets
  serial: sh-sci: Drop the sci_fck clock fallback
  sh: sh7734: Correct SCIF type for BRG
  sh: Remove sci_ick clock alias
  sh: Rename sci_ick and sci_fck clock to fck
  serial: sh-sci: Add support for optional BRG on (H)SCIF
  serial: sh-sci: Add support for optional external (H)SCK input
  serial: sh-sci: Prepare for multiple sampling clock sources
  serial: sh-sci: Correct SCIF type on R-Car for BRG
  serial: sh-sci: Correct SCIF type on RZ/A1H
  serial: sh-sci: Replace struct sci_port_info by type/regtype encoding
  serial: sh-sci: Add BRG register definitions
  serial: sh-sci: Take into account sampling rate for max baud rate
  serial: sh-sci: Merge sci_scbrr_calc() and sci_baud_calc_hscif()
  serial: sh-sci: Avoid calculating the receive margin for HSCIF
  serial: sh-sci: Improve bit rate error calculation for HSCIF
  ...
parents 237f38c3 041497eb

Documentation/devicetree/bindings/serial/renesas,sci-serial.txt

+34 −10
Original line number Diff line number Diff line
@@ -2,7 +2,7 @@ 


Required properties:



  - compatible: Must contain one of the following:

  - compatible: Must contain one or more of the following:



    - "renesas,scif-r7s72100" for R7S72100 (RZ/A1H) SCIF compatible UART.

    - "renesas,scifa-r8a73a4" for R8A73A4 (R-Mobile APE6) SCIFA compatible UART.
@@ -15,10 +15,14 @@ Required properties: 
    - "renesas,scifa-r8a7790" for R8A7790 (R-Car H2) SCIFA compatible UART.

    - "renesas,scifb-r8a7790" for R8A7790 (R-Car H2) SCIFB compatible UART.

    - "renesas,hscif-r8a7790" for R8A7790 (R-Car H2) HSCIF compatible UART.

    - "renesas,scif-r8a7791" for R8A7791 (R-Car M2) SCIF compatible UART.

    - "renesas,scifa-r8a7791" for R8A7791 (R-Car M2) SCIFA compatible UART.

    - "renesas,scifb-r8a7791" for R8A7791 (R-Car M2) SCIFB compatible UART.

    - "renesas,hscif-r8a7791" for R8A7791 (R-Car M2) HSCIF compatible UART.

    - "renesas,scif-r8a7791" for R8A7791 (R-Car M2-W) SCIF compatible UART.

    - "renesas,scifa-r8a7791" for R8A7791 (R-Car M2-W) SCIFA compatible UART.

    - "renesas,scifb-r8a7791" for R8A7791 (R-Car M2-W) SCIFB compatible UART.

    - "renesas,hscif-r8a7791" for R8A7791 (R-Car M2-W) HSCIF compatible UART.

    - "renesas,scif-r8a7793" for R8A7793 (R-Car M2-N) SCIF compatible UART.

    - "renesas,scifa-r8a7793" for R8A7793 (R-Car M2-N) SCIFA compatible UART.

    - "renesas,scifb-r8a7793" for R8A7793 (R-Car M2-N) SCIFB compatible UART.

    - "renesas,hscif-r8a7793" for R8A7793 (R-Car M2-N) HSCIF compatible UART.

    - "renesas,scif-r8a7794" for R8A7794 (R-Car E2) SCIF compatible UART.

    - "renesas,scifa-r8a7794" for R8A7794 (R-Car E2) SCIFA compatible UART.

    - "renesas,scifb-r8a7794" for R8A7794 (R-Car E2) SCIFB compatible UART.
@@ -27,6 +31,14 @@ Required properties: 
    - "renesas,hscif-r8a7795" for R8A7795 (R-Car H3) HSCIF compatible UART.

    - "renesas,scifa-sh73a0" for SH73A0 (SH-Mobile AG5) SCIFA compatible UART.

    - "renesas,scifb-sh73a0" for SH73A0 (SH-Mobile AG5) SCIFB compatible UART.

    - "renesas,rcar-gen1-scif" for R-Car Gen1 SCIF compatible UART,

    - "renesas,rcar-gen2-scif" for R-Car Gen2 SCIF compatible UART,

    - "renesas,rcar-gen3-scif" for R-Car Gen3 SCIF compatible UART,

    - "renesas,rcar-gen2-scifa" for R-Car Gen2 SCIFA compatible UART,

    - "renesas,rcar-gen2-scifb" for R-Car Gen2 SCIFB compatible UART,

    - "renesas,rcar-gen1-hscif" for R-Car Gen1 HSCIF compatible UART,

    - "renesas,rcar-gen2-hscif" for R-Car Gen2 HSCIF compatible UART,

    - "renesas,rcar-gen3-hscif" for R-Car Gen3 HSCIF compatible UART,

    - "renesas,scif" for generic SCIF compatible UART.

    - "renesas,scifa" for generic SCIFA compatible UART.

    - "renesas,scifb" for generic SCIFB compatible UART.
@@ -34,15 +46,26 @@ Required properties: 
    - "renesas,sci" for generic SCI compatible UART.



    When compatible with the generic version, nodes must list the

    SoC-specific version corresponding to the platform first followed by the

    generic version.

    SoC-specific version corresponding to the platform first, followed by the

    family-specific and/or generic versions.



  - reg: Base address and length of the I/O registers used by the UART.

  - interrupts: Must contain an interrupt-specifier for the SCIx interrupt.



  - clocks: Must contain a phandle and clock-specifier pair for each entry

    in clock-names.

  - clock-names: Must contain "sci_ick" for the SCIx UART interface clock.

  - clock-names: Must contain "fck" for the SCIx UART functional clock.

    Apart from the divided functional clock, there may be other possible

    sources for the sampling clock, depending on SCIx variant.

    On (H)SCI(F) and some SCIFA, an additional clock may be specified:

      - "hsck" for the optional external clock input (on HSCIF),

      - "sck" for the optional external clock input (on other variants).

    On UARTs equipped with a Baud Rate Generator for External Clock (BRG)

    (some SCIF and HSCIF), additional clocks may be specified:

      - "brg_int" for the optional internal clock source for the frequency

	divider (typically the (AXI or SHwy) bus clock),

      - "scif_clk" for the optional external clock source for the frequency

	divider (SCIF_CLK).



Note: Each enabled SCIx UART should have an alias correctly numbered in the

"aliases" node.
@@ -58,12 +81,13 @@ Example: 
	};



	scifa0: serial@e6c40000 {

		compatible = "renesas,scifa-r8a7790", "renesas,scifa";

		compatible = "renesas,scifa-r8a7790",

			     "renesas,rcar-gen2-scifa", "renesas,scifa";

		reg = <0 0xe6c40000 0 64>;

		interrupt-parent = <&gic>;

		interrupts = <0 144 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp2_clks R8A7790_CLK_SCIFA0>;

		clock-names = "sci_ick";

		clock-names = "fck";

		dmas = <&dmac0 0x21>, <&dmac0 0x22>;

		dma-names = "tx", "rx";

	};

Documentation/kernel-parameters.txt

+9 −5
Original line number Diff line number Diff line
@@ -730,16 +730,17 @@ bytes respectively. Such letter suffixes can also be entirely omitted. 


		uart[8250],io,<addr>[,options]

		uart[8250],mmio,<addr>[,options]

		uart[8250],mmio16,<addr>[,options]

		uart[8250],mmio32,<addr>[,options]

		uart[8250],0x<addr>[,options]

			Start an early, polled-mode console on the 8250/16550

			UART at the specified I/O port or MMIO address,

			switching to the matching ttyS device later.

			MMIO inter-register address stride is either 8-bit

			(mmio) or 32-bit (mmio32).

			If none of [io|mmio|mmio32], <addr> is assumed to be

			equivalent to 'mmio'. 'options' are specified in the

			same format described for ttyS above; if unspecified,

			(mmio), 16-bit (mmio16), or 32-bit (mmio32).

			If none of [io|mmio|mmio16|mmio32], <addr> is assumed

			to be equivalent to 'mmio'. 'options' are specified in

			the same format described for ttyS above; if unspecified,

			the h/w is not re-initialized.



		hvc<n>	Use the hypervisor console device <n>. This is for
@@ -1011,10 +1012,13 @@ bytes respectively. Such letter suffixes can also be entirely omitted. 
			unspecified, the h/w is not initialized.



		pl011,<addr>

		pl011,mmio32,<addr>

			Start an early, polled-mode console on a pl011 serial

			port at the specified address. The pl011 serial port

			must already be setup and configured. Options are not

			yet supported.

			yet supported.  If 'mmio32' is specified, then only

			the driver will use only 32-bit accessors to read/write

			the device registers.



		msm_serial,<addr>

			Start an early, polled-mode console on an msm serial

arch/sh/kernel/cpu/clock-cpg.c

+0 −1
Original line number Diff line number Diff line
@@ -63,7 +63,6 @@ int __init __deprecated cpg_clk_init(void) 
	clk_add_alias("fck", "sh-mtu2", "peripheral_clk", NULL);

	clk_add_alias("fck", "sh-cmt-16.0", "peripheral_clk", NULL);

	clk_add_alias("fck", "sh-cmt-32.0", "peripheral_clk", NULL);

	clk_add_alias("sci_ick", NULL, "peripheral_clk", NULL);



	return ret;

}

arch/sh/kernel/cpu/sh2a/clock-sh7264.c

+8 −1
Original line number Diff line number Diff line
@@ -115,7 +115,14 @@ static struct clk_lookup lookups[] = { 
	CLKDEV_CON_ID("peripheral_clk", &div4_clks[DIV4_P]),



	/* MSTP clocks */

	CLKDEV_CON_ID("sci_ick", &mstp_clks[MSTP77]),

	CLKDEV_ICK_ID("fck", "sh-sci.0", &mstp_clks[MSTP77]),

	CLKDEV_ICK_ID("fck", "sh-sci.1", &mstp_clks[MSTP77]),

	CLKDEV_ICK_ID("fck", "sh-sci.2", &mstp_clks[MSTP77]),

	CLKDEV_ICK_ID("fck", "sh-sci.3", &mstp_clks[MSTP77]),

	CLKDEV_ICK_ID("fck", "sh-sci.4", &mstp_clks[MSTP77]),

	CLKDEV_ICK_ID("fck", "sh-sci.5", &mstp_clks[MSTP77]),

	CLKDEV_ICK_ID("fck", "sh-sci.6", &mstp_clks[MSTP77]),

	CLKDEV_ICK_ID("fck", "sh-sci.7", &mstp_clks[MSTP77]),

	CLKDEV_CON_ID("vdc3", &mstp_clks[MSTP74]),

	CLKDEV_ICK_ID("fck", "sh-cmt-16.0", &mstp_clks[MSTP72]),

	CLKDEV_CON_ID("usb0", &mstp_clks[MSTP60]),

arch/sh/kernel/cpu/sh2a/clock-sh7269.c

+8 −8
Original line number Diff line number Diff line
@@ -150,14 +150,14 @@ static struct clk_lookup lookups[] = { 
	CLKDEV_CON_ID("bus_clk", &div4_clks[DIV4_B]),



	/* MSTP clocks */

	CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[MSTP47]),

	CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[MSTP46]),

	CLKDEV_ICK_ID("sci_fck", "sh-sci.2", &mstp_clks[MSTP45]),

	CLKDEV_ICK_ID("sci_fck", "sh-sci.3", &mstp_clks[MSTP44]),

	CLKDEV_ICK_ID("sci_fck", "sh-sci.4", &mstp_clks[MSTP43]),

	CLKDEV_ICK_ID("sci_fck", "sh-sci.5", &mstp_clks[MSTP42]),

	CLKDEV_ICK_ID("sci_fck", "sh-sci.6", &mstp_clks[MSTP41]),

	CLKDEV_ICK_ID("sci_fck", "sh-sci.7", &mstp_clks[MSTP40]),

	CLKDEV_ICK_ID("fck", "sh-sci.0", &mstp_clks[MSTP47]),

	CLKDEV_ICK_ID("fck", "sh-sci.1", &mstp_clks[MSTP46]),

	CLKDEV_ICK_ID("fck", "sh-sci.2", &mstp_clks[MSTP45]),

	CLKDEV_ICK_ID("fck", "sh-sci.3", &mstp_clks[MSTP44]),

	CLKDEV_ICK_ID("fck", "sh-sci.4", &mstp_clks[MSTP43]),

	CLKDEV_ICK_ID("fck", "sh-sci.5", &mstp_clks[MSTP42]),

	CLKDEV_ICK_ID("fck", "sh-sci.6", &mstp_clks[MSTP41]),

	CLKDEV_ICK_ID("fck", "sh-sci.7", &mstp_clks[MSTP40]),

	CLKDEV_ICK_ID("fck", "sh-cmt-16.0", &mstp_clks[MSTP72]),

	CLKDEV_CON_ID("usb0", &mstp_clks[MSTP60]),

	CLKDEV_ICK_ID("fck", "sh-mtu2", &mstp_clks[MSTP35]),