Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 6773af26 authored by Caesar Wang's avatar Caesar Wang Committed by Heiko Stuebner
Browse files

ARM: dts: rockchip: fix PWM clock found on RK3288 Socs 



We use the new PWM IP on RK3288, but the PWM's clock indeed incorrect.

Signed-off-by: default avatarCaesar Wang <caesar.wang@rock-chips.com>
Signed-off-by: default avatarDouglas Anderson <dianders@chromium.org>
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent a188339c

arch/arm/boot/dts/rk3288.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -682,7 +682,7 @@ 
		#pwm-cells = <3>;

		pinctrl-names = "default";

		pinctrl-0 = <&pwm0_pin>;

		clocks = <&cru PCLK_PWM>;

		clocks = <&cru PCLK_RKPWM>;

		clock-names = "pwm";

		status = "disabled";

	};
@@ -693,7 +693,7 @@ 
		#pwm-cells = <3>;

		pinctrl-names = "default";

		pinctrl-0 = <&pwm1_pin>;

		clocks = <&cru PCLK_PWM>;

		clocks = <&cru PCLK_RKPWM>;

		clock-names = "pwm";

		status = "disabled";

	};
@@ -704,7 +704,7 @@ 
		#pwm-cells = <3>;

		pinctrl-names = "default";

		pinctrl-0 = <&pwm2_pin>;

		clocks = <&cru PCLK_PWM>;

		clocks = <&cru PCLK_RKPWM>;

		clock-names = "pwm";

		status = "disabled";

	};
@@ -715,7 +715,7 @@ 
		#pwm-cells = <2>;

		pinctrl-names = "default";

		pinctrl-0 = <&pwm3_pin>;

		clocks = <&cru PCLK_PWM>;

		clocks = <&cru PCLK_RKPWM>;

		clock-names = "pwm";

		status = "disabled";

	};