Commit 671f950d authored Oct 30, 2022 by Johan Jonker Committed by Greg Kroah-Hartman Dec 14, 2022

ARM: dts: rockchip: disable arm_global_timer on rk3066 and rk3188



[ Upstream commit da74858a475782a3f16470907814c8cc5950ad68 ]

The clock source and the sched_clock provided by the arm_global_timer
on Rockchip rk3066a/rk3188 are quite unstable because their rates
depend on the CPU frequency.

Recent changes to the arm_global_timer driver makes it impossible to use.

On the other side, the arm_global_timer has a higher rating than the
ROCKCHIP_TIMER, it will be selected by default by the time framework
while we want to use the stable Rockchip clock source.

Keep the arm_global_timer disabled in order to have the
DW_APB_TIMER (rk3066a) or ROCKCHIP_TIMER (rk3188) selected by default.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/f275ca8d-fd0a-26e5-b978-b7f3df815e0a@gmail.com


Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>

parent 2c2c5d1d

arch/arm/boot/dts/rk3188.dtsi

+0 −1

Original line number	Diff line number	Diff line
		@@ -632,7 +632,6 @@

		&global_timer {
		interrupts = <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) \| IRQ_TYPE_EDGE_RISING)>;
		status = "disabled";
		};

		&local_timer {

arch/arm/boot/dts/rk3xxx.dtsi

+7 −0

Original line number	Diff line number	Diff line
		@@ -108,6 +108,13 @@
		reg = <0x1013c200 0x20>;
		interrupts = <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) \| IRQ_TYPE_EDGE_RISING)>;
		clocks = <&cru CORE_PERI>;
		status = "disabled";
		/* The clock source and the sched_clock provided by the arm_global_timer
		* on Rockchip rk3066a/rk3188 are quite unstable because their rates
		* depend on the CPU frequency.
		* Keep the arm_global_timer disabled in order to have the
		* DW_APB_TIMER (rk3066a) or ROCKCHIP_TIMER (rk3188) selected by default.
		*/
		};

		local_timer: local-timer@1013c600 {