Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 66fc8296 authored by Chris Wilson's avatar Chris Wilson
Browse files

drm/i915/execlists: Include reset depth in traces 



Show the reset depth (the tasklet disable count) in the GEM_TRACE to
indicate when we might not expect tasklets to be flushed.

Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: default avatarMika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180815135827.25869-1-chris@chris-wilson.co.uk
parent dce88879

drivers/gpu/drm/i915/intel_lrc.c

+4 −2
Original line number Diff line number Diff line
@@ -1828,7 +1828,8 @@ execlists_reset_prepare(struct intel_engine_cs *engine) 
	struct i915_request *request, *active;

	unsigned long flags;



	GEM_TRACE("%s\n", engine->name);

	GEM_TRACE("%s: depth<-%d\n", engine->name,

		  atomic_read(&execlists->tasklet.count));



	/*

	 * Prevent request submission to the hardware until we have
@@ -1976,7 +1977,8 @@ static void execlists_reset_finish(struct intel_engine_cs *engine) 
	 */

	__tasklet_enable_sync_once(&execlists->tasklet);



	GEM_TRACE("%s\n", engine->name);

	GEM_TRACE("%s: depth->%d\n", engine->name,

		  atomic_read(&execlists->tasklet.count));

}



static int intel_logical_ring_emit_pdps(struct i915_request *rq)