Loading qcom/ipcc-test.dtsi 0 → 100644 +10 −0 Original line number Diff line number Diff line #include <dt-bindings/soc/qcom,ipcc.h> &soc { ipcc_self_ping_apss: ipcc-self-ping-apss { compatible = "qcom,ipcc-self-ping"; interrupts-extended = <&ipcc_mproc IPCC_CLIENT_APSS IPCC_MPROC_SIGNAL_SMP2P IRQ_TYPE_LEVEL_HIGH>; mboxes = <&ipcc_mproc IPCC_CLIENT_APSS IPCC_MPROC_SIGNAL_SMP2P>; }; }; qcom/lahaina.dtsi +10 −0 Original line number Diff line number Diff line Loading @@ -7,6 +7,7 @@ #include <dt-bindings/clock/qcom,videocc-lahaina.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interconnect/qcom,lahaina.h> #include <dt-bindings/soc/qcom,ipcc.h> #include "lahaina-regulators.dtsi" Loading Loading @@ -401,6 +402,15 @@ }; }; ipcc_mproc: qcom,ipcc@408000 { compatible = "qcom,ipcc"; reg = <0x408000 0x1000>; interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>; interrupt-controller; #interrupt-cells = <3>; #mbox-cells = <2>; }; clocks { xo_board: xo-board { compatible = "fixed-clock"; Loading Loading
qcom/ipcc-test.dtsi 0 → 100644 +10 −0 Original line number Diff line number Diff line #include <dt-bindings/soc/qcom,ipcc.h> &soc { ipcc_self_ping_apss: ipcc-self-ping-apss { compatible = "qcom,ipcc-self-ping"; interrupts-extended = <&ipcc_mproc IPCC_CLIENT_APSS IPCC_MPROC_SIGNAL_SMP2P IRQ_TYPE_LEVEL_HIGH>; mboxes = <&ipcc_mproc IPCC_CLIENT_APSS IPCC_MPROC_SIGNAL_SMP2P>; }; };
qcom/lahaina.dtsi +10 −0 Original line number Diff line number Diff line Loading @@ -7,6 +7,7 @@ #include <dt-bindings/clock/qcom,videocc-lahaina.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interconnect/qcom,lahaina.h> #include <dt-bindings/soc/qcom,ipcc.h> #include "lahaina-regulators.dtsi" Loading Loading @@ -401,6 +402,15 @@ }; }; ipcc_mproc: qcom,ipcc@408000 { compatible = "qcom,ipcc"; reg = <0x408000 0x1000>; interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>; interrupt-controller; #interrupt-cells = <3>; #mbox-cells = <2>; }; clocks { xo_board: xo-board { compatible = "fixed-clock"; Loading