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Commit 667ce33e authored by Rob Clark's avatar Rob Clark
Browse files

drm/msm: support multiple address spaces 



We can have various combinations of 64b and 32b address space, ie. 64b
CPU but 32b display and gpu, or 64b CPU and GPU but 32b display.  So
best to decouple the device iova's from mmap offset.

Signed-off-by: default avatarRob Clark <robdclark@gmail.com>
parent 394da4b8

drivers/gpu/drm/msm/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -48,6 +48,7 @@ msm-y := \ 
	msm_gem_prime.o \

	msm_gem_shrinker.o \

	msm_gem_submit.o \

	msm_gem_vma.o \

	msm_gpu.o \

	msm_iommu.o \

	msm_perf.o \

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

+1 −1
Original line number Diff line number Diff line
@@ -583,7 +583,7 @@ struct msm_gpu *a3xx_gpu_init(struct drm_device *dev) 
#endif

	}



	if (!gpu->mmu) {

	if (!gpu->aspace) {

		/* TODO we think it is possible to configure the GPU to

		 * restrict access to VRAM carveout.  But the required

		 * registers are unknown.  For now just bail out and

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

+1 −1
Original line number Diff line number Diff line
@@ -672,7 +672,7 @@ struct msm_gpu *a4xx_gpu_init(struct drm_device *dev) 
#endif

	}



	if (!gpu->mmu) {

	if (!gpu->aspace) {

		/* TODO we think it is possible to configure the GPU to

		 * restrict access to VRAM carveout.  But the required

		 * registers are unknown.  For now just bail out and

drivers/gpu/drm/msm/adreno/adreno_gpu.c

+1 −1
Original line number Diff line number Diff line
@@ -381,7 +381,7 @@ int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev, 
		return ret;

	}



	mmu = gpu->mmu;

	mmu = gpu->aspace->mmu;

	if (mmu) {

		ret = mmu->funcs->attach(mmu, iommu_ports,

				ARRAY_SIZE(iommu_ports));

drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c

+23 −15
Original line number Diff line number Diff line
@@ -17,6 +17,7 @@ 




#include "msm_drv.h"

#include "msm_gem.h"

#include "msm_mmu.h"

#include "mdp4_kms.h"
@@ -159,17 +160,18 @@ static void mdp4_destroy(struct msm_kms *kms) 
{

	struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));

	struct device *dev = mdp4_kms->dev->dev;

	struct msm_mmu *mmu = mdp4_kms->mmu;



	if (mmu) {

		mmu->funcs->detach(mmu, iommu_ports, ARRAY_SIZE(iommu_ports));

		mmu->funcs->destroy(mmu);

	}

	struct msm_gem_address_space *aspace = mdp4_kms->aspace;



	if (mdp4_kms->blank_cursor_iova)

		msm_gem_put_iova(mdp4_kms->blank_cursor_bo, mdp4_kms->id);

	drm_gem_object_unreference_unlocked(mdp4_kms->blank_cursor_bo);



	if (aspace) {

		aspace->mmu->funcs->detach(aspace->mmu,

				iommu_ports, ARRAY_SIZE(iommu_ports));

		msm_gem_address_space_destroy(aspace);

	}



	if (mdp4_kms->rpm_enabled)

		pm_runtime_disable(dev);
@@ -440,7 +442,7 @@ struct msm_kms *mdp4_kms_init(struct drm_device *dev) 
	struct mdp4_platform_config *config = mdp4_get_config(pdev);

	struct mdp4_kms *mdp4_kms;

	struct msm_kms *kms = NULL;

	struct msm_mmu *mmu;

	struct msm_gem_address_space *aspace;

	int irq, ret;



	mdp4_kms = kzalloc(sizeof(*mdp4_kms), GFP_KERNEL);
@@ -531,24 +533,26 @@ struct msm_kms *mdp4_kms_init(struct drm_device *dev) 
	mdelay(16);



	if (config->iommu) {

		mmu = msm_iommu_new(&pdev->dev, config->iommu);

		if (IS_ERR(mmu)) {

			ret = PTR_ERR(mmu);

		aspace = msm_gem_address_space_create(&pdev->dev,

				config->iommu, "mdp4");

		if (IS_ERR(aspace)) {

			ret = PTR_ERR(aspace);

			goto fail;

		}

		ret = mmu->funcs->attach(mmu, iommu_ports,



		mdp4_kms->aspace = aspace;



		ret = aspace->mmu->funcs->attach(aspace->mmu, iommu_ports,

				ARRAY_SIZE(iommu_ports));

		if (ret)

			goto fail;



		mdp4_kms->mmu = mmu;

	} else {

		dev_info(dev->dev, "no iommu, fallback to phys "

				"contig buffers for scanout\n");

		mmu = NULL;

		aspace = NULL;

	}



	mdp4_kms->id = msm_register_mmu(dev, mmu);

	mdp4_kms->id = msm_register_address_space(dev, aspace);

	if (mdp4_kms->id < 0) {

		ret = mdp4_kms->id;

		dev_err(dev->dev, "failed to register mdp4 iommu: %d\n", ret);
@@ -598,6 +602,10 @@ static struct mdp4_platform_config *mdp4_get_config(struct platform_device *dev) 
	/* TODO: Chips that aren't apq8064 have a 200 Mhz max_clk */

	config.max_clk = 266667000;

	config.iommu = iommu_domain_alloc(&platform_bus_type);

	if (config.iommu) {

		config.iommu->geometry.aperture_start = 0x1000;

		config.iommu->geometry.aperture_end = 0xffffffff;

	}



	return &config;

}