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Commit 6565945b authored by Alex Deucher's avatar Alex Deucher Committed by Dave Airlie
Browse files

drm/radeon/kms: add info query for tile pipes 



needed by mesa for htile setup.

Signed-off-by: default avatarAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent 834f0c35

drivers/gpu/drm/radeon/radeon_kms.c

+13 −0
Original line number Original line Diff line number Diff line
@@ -221,6 +221,19 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) 
			return -EINVAL;

			return -EINVAL;

		}

		}

		break;

		break;

	case RADEON_INFO_NUM_TILE_PIPES:

		if (rdev->family >= CHIP_CAYMAN)

			value = rdev->config.cayman.max_tile_pipes;

		else if (rdev->family >= CHIP_CEDAR)

			value = rdev->config.evergreen.max_tile_pipes;

		else if (rdev->family >= CHIP_RV770)

			value = rdev->config.rv770.max_tile_pipes;

		else if (rdev->family >= CHIP_R600)

			value = rdev->config.r600.max_tile_pipes;

		else {

			return -EINVAL;

		}

		break;

	default:

	default:

		DRM_DEBUG_KMS("Invalid request %d\n", info->request);

		DRM_DEBUG_KMS("Invalid request %d\n", info->request);

		return -EINVAL;

		return -EINVAL;

include/drm/radeon_drm.h

+1 −0
Original line number Original line Diff line number Diff line
@@ -909,6 +909,7 @@ struct drm_radeon_cs { 
#define RADEON_INFO_WANT_CMASK		0x08 /* get access to CMASK on r300 */

#define RADEON_INFO_WANT_CMASK		0x08 /* get access to CMASK on r300 */

#define RADEON_INFO_CLOCK_CRYSTAL_FREQ	0x09 /* clock crystal frequency */

#define RADEON_INFO_CLOCK_CRYSTAL_FREQ	0x09 /* clock crystal frequency */

#define RADEON_INFO_NUM_BACKENDS	0x0a /* DB/backends for r600+ - need for OQ */

#define RADEON_INFO_NUM_BACKENDS	0x0a /* DB/backends for r600+ - need for OQ */

#define RADEON_INFO_NUM_TILE_PIPES	0x0b /* tile pipes for r600+ */





struct drm_radeon_info {

struct drm_radeon_info {

	uint32_t		request;

	uint32_t		request;