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Commit 65307f2e authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'drm-fixes-for-v4.16-rc5' of git://people.freedesktop.org/~airlied/linux 

Pull drm fixes from Dave Airlie:
 "There are a small set of sun4i and i915 fixes, and many more amdgpu
  fixes:

  sun4i:
   - divide by zero fix
   - clock and LVDS fixes

  i915:
   - fix for perf
   - race fix

  amdgpu:
   - a bit more than we are normally comfortable with at this point,
     however it does fix a lot of display issues with the new DC code
     which result in black screens in various configurations along with
     some run of the mill gpu configuration fixes.

     I'm happy enough that the fixes are limited to the DC code and
     should fix a bunch of issues on the new raven ridge APUs that we
     are seeing shipped now"

* tag 'drm-fixes-for-v4.16-rc5' of git://people.freedesktop.org/~airlied/linux: (42 commits)
  drm/amd/display: validate plane format on primary plane
  drm/amdgpu:Always save uvd vcpu_bo in VM Mode
  drm/amdgpu:Correct max uvd handles
  drm/amd/display: early return if not in vga mode in disable_vga
  drm/amd/display: Fix takover from VGA mode
  drm/amd/display: Fix memleaks when atomic check fails.
  drm/amd/display: Return success when enabling interrupt
  drm/amd/display: Use crtc enable/disable_vblank hooks
  drm/amd/display: update infoframe after dig fe is turned on
  drm/amd/display: fix boot-up on vega10
  drm/amd/display: fix cursor related Pstate hang
  drm/amd/display: Set irq state only on existing crtcs
  drm/amd/display: Fixed non-native modes not lighting up
  drm/amd/display: Call update_stream_signal directly from amdgpu_dm
  drm/amd/display: Make create_stream_for_sink more consistent
  drm/amd/display: Don't block dual-link DVI modes
  drm/amd/display: Don't allow dual-link DVI on all ASICs.
  drm/amd/display: Pass signal directly to enable_tmds_output
  drm/amd/display: Remove unnecessary fail labels in create_stream_for_sink
  drm/amd/display: Move MAX_TMDS_CLOCK define to header
  ...
parents dfbab3fa b0655d66

drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c

+3 −0
Original line number Original line Diff line number Diff line
@@ -540,6 +540,9 @@ int amdgpu_acpi_pcie_performance_request(struct amdgpu_device *adev, 
	size_t size;

	size_t size;

	u32 retry = 3;

	u32 retry = 3;





	if (amdgpu_acpi_pcie_notify_device_ready(adev))

		return -EINVAL;



	/* Get the device handle */

	/* Get the device handle */

	handle = ACPI_HANDLE(&adev->pdev->dev);

	handle = ACPI_HANDLE(&adev->pdev->dev);

	if (!handle)

	if (!handle)

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -481,7 +481,7 @@ static ssize_t amdgpu_debugfs_ring_read(struct file *f, char __user *buf, 
	result = 0;

	result = 0;





	if (*pos < 12) {

	if (*pos < 12) {

		early[0] = amdgpu_ring_get_rptr(ring);

		early[0] = amdgpu_ring_get_rptr(ring) & ring->buf_mask;

		early[1] = amdgpu_ring_get_wptr(ring) & ring->buf_mask;

		early[1] = amdgpu_ring_get_wptr(ring) & ring->buf_mask;

		early[2] = ring->wptr & ring->buf_mask;

		early[2] = ring->wptr & ring->buf_mask;

		for (i = *pos / 4; i < 3 && size; i++) {

		for (i = *pos / 4; i < 3 && size; i++) {

drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c

+8 −5
Original line number Original line Diff line number Diff line
@@ -299,12 +299,15 @@ int amdgpu_uvd_suspend(struct amdgpu_device *adev) 




	cancel_delayed_work_sync(&adev->uvd.idle_work);

	cancel_delayed_work_sync(&adev->uvd.idle_work);





	/* only valid for physical mode */

	if (adev->asic_type < CHIP_POLARIS10) {

		for (i = 0; i < adev->uvd.max_handles; ++i)

		for (i = 0; i < adev->uvd.max_handles; ++i)

			if (atomic_read(&adev->uvd.handles[i]))

			if (atomic_read(&adev->uvd.handles[i]))

				break;

				break;





	if (i == AMDGPU_MAX_UVD_HANDLES)

		if (i == adev->uvd.max_handles)

			return 0;

			return 0;

	}





	size = amdgpu_bo_size(adev->uvd.vcpu_bo);

	size = amdgpu_bo_size(adev->uvd.vcpu_bo);

	ptr = adev->uvd.cpu_addr;

	ptr = adev->uvd.cpu_addr;

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -3093,7 +3093,7 @@ static int dce_v6_0_hpd_irq(struct amdgpu_device *adev, 
		tmp |= DC_HPD1_INT_CONTROL__DC_HPD1_INT_ACK_MASK;

		tmp |= DC_HPD1_INT_CONTROL__DC_HPD1_INT_ACK_MASK;

		WREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[hpd], tmp);

		WREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[hpd], tmp);

		schedule_work(&adev->hotplug_work);

		schedule_work(&adev->hotplug_work);

		DRM_INFO("IH: HPD%d\n", hpd + 1);

		DRM_DEBUG("IH: HPD%d\n", hpd + 1);

	}

	}





	return 0;

	return 0;

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

+2 −28
Original line number Original line Diff line number Diff line
@@ -4384,34 +4384,8 @@ static void gfx_v7_0_gpu_early_init(struct amdgpu_device *adev) 
	case CHIP_KAVERI:

	case CHIP_KAVERI:

		adev->gfx.config.max_shader_engines = 1;

		adev->gfx.config.max_shader_engines = 1;

		adev->gfx.config.max_tile_pipes = 4;

		adev->gfx.config.max_tile_pipes = 4;

		if ((adev->pdev->device == 0x1304) ||

		    (adev->pdev->device == 0x1305) ||

		    (adev->pdev->device == 0x130C) ||

		    (adev->pdev->device == 0x130F) ||

		    (adev->pdev->device == 0x1310) ||

		    (adev->pdev->device == 0x1311) ||

		    (adev->pdev->device == 0x131C)) {

		adev->gfx.config.max_cu_per_sh = 8;

		adev->gfx.config.max_cu_per_sh = 8;

		adev->gfx.config.max_backends_per_se = 2;

		adev->gfx.config.max_backends_per_se = 2;

		} else if ((adev->pdev->device == 0x1309) ||

			   (adev->pdev->device == 0x130A) ||

			   (adev->pdev->device == 0x130D) ||

			   (adev->pdev->device == 0x1313) ||

			   (adev->pdev->device == 0x131D)) {

			adev->gfx.config.max_cu_per_sh = 6;

			adev->gfx.config.max_backends_per_se = 2;

		} else if ((adev->pdev->device == 0x1306) ||

			   (adev->pdev->device == 0x1307) ||

			   (adev->pdev->device == 0x130B) ||

			   (adev->pdev->device == 0x130E) ||

			   (adev->pdev->device == 0x1315) ||

			   (adev->pdev->device == 0x131B)) {

			adev->gfx.config.max_cu_per_sh = 4;

			adev->gfx.config.max_backends_per_se = 1;

		} else {

			adev->gfx.config.max_cu_per_sh = 3;

			adev->gfx.config.max_backends_per_se = 1;

		}

		adev->gfx.config.max_sh_per_se = 1;

		adev->gfx.config.max_sh_per_se = 1;

		adev->gfx.config.max_texture_channel_caches = 4;

		adev->gfx.config.max_texture_channel_caches = 4;

		adev->gfx.config.max_gprs = 256;

		adev->gfx.config.max_gprs = 256;