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Commit 6503fe4a authored by Michael Trimarchi's avatar Michael Trimarchi Committed by Paul Mundt
Browse files

sh: Better description of SH-4 PTEA register update. 



Signed-off-by: default avatarMichael Trimarchi <trimarchimichael@yahoo.it>
Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent 5c9740a8

arch/sh/include/asm/pgtable_32.h

+8 −0
Original line number Diff line number Diff line
@@ -87,6 +87,14 @@ 
#define _PAGE_PCC_ATR8	0x60000000	/* Attribute Memory space, 8 bit bus */

#define _PAGE_PCC_ATR16	0x60000001	/* Attribute Memory space, 6 bit bus */



#ifndef CONFIG_X2TLB

/* copy the ptea attributes */

static inline unsigned long copy_ptea_attributes(unsigned long x)

{

	return	((x >> 28) & 0xe) | (x & 0x1);

}

#endif



/* Mask which drops unused bits from the PTEL value */

#if defined(CONFIG_CPU_SH3)

#define _PAGE_CLEAR_FLAGS	(_PAGE_PROTNONE | _PAGE_ACCESSED| \

arch/sh/mm/tlb-sh4.c

+6 −3
Original line number Diff line number Diff line
@@ -61,9 +61,12 @@ void update_mmu_cache(struct vm_area_struct * vma, 
	 */

	ctrl_outl(pte.pte_high, MMU_PTEA);

#else

	if (cpu_data->flags & CPU_HAS_PTEA)

		/* TODO: make this look less hacky */

		ctrl_outl(((pteval >> 28) & 0xe) | (pteval & 0x1), MMU_PTEA);

	if (cpu_data->flags & CPU_HAS_PTEA) {

		/* The last 3 bits and the first one of pteval contains

		 * the PTEA timing control and space attribute bits

		 */

		ctrl_outl(copy_ptea_attributes(pteval), MMU_PTEA);

	}

#endif



	/* Set PTEL register */