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Commit 64e3481c authored by Douglas Anderson's avatar Douglas Anderson Committed by Heiko Stuebner
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arm64: dts: rockchip: Add soc-ctl-syscon to sdhci for rk3399 



On rk3399 we'd like to be able to properly set corecfg registers in the
Arasan SDHCI component.  Specify the syscon to enable that.

Signed-off-by: default avatarDouglas Anderson <dianders@chromium.org>
Tested-by: default avatarHeiko Stuebner <heiko@sntech.de>
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent ad1cfdf5

arch/arm64/boot/dts/rockchip/rk3399.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -229,6 +229,7 @@ 
		compatible = "rockchip,rk3399-sdhci-5.1", "arasan,sdhci-5.1";

		reg = <0x0 0xfe330000 0x0 0x10000>;

		interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;

		arasan,soc-ctl-syscon = <&grf>;

		assigned-clocks = <&cru SCLK_EMMC>;

		assigned-clock-rates = <200000000>;

		clocks = <&cru SCLK_EMMC>, <&cru ACLK_EMMC>;