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Commit 64d45ce5 authored by Camera Software Integration's avatar Camera Software Integration Committed by Gerrit - the friendly Code Review server
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Merge "msm: camera: ife: Configure epoch to exactly half of the frame" into camera-kernel.lnx.4.0

parents 5d431189 762751a8
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+67 −0
Original line number Diff line number Diff line
@@ -49,6 +49,7 @@ static uint32_t blob_type_hw_cmd_map[CAM_ISP_GENERIC_BLOB_TYPE_MAX] = {
	CAM_ISP_HW_CMD_CORE_CONFIG,
	CAM_ISP_HW_CMD_WM_CONFIG_UPDATE,
	CAM_ISP_HW_CMD_BW_UPDATE_V2,
	CAM_ISP_HW_CMD_BLANKING_UPDATE,
};

static struct cam_ife_hw_mgr g_ife_hw_mgr;
@@ -5577,6 +5578,53 @@ static int cam_isp_blob_csid_config_update(

	return rc;
}

static int cam_isp_blob_sensor_blanking_config(
	uint32_t                               blob_type,
	struct cam_isp_generic_blob_info      *blob_info,
	struct cam_isp_sensor_blanking_config *sensor_blanking_config,
	struct cam_hw_prepare_update_args     *prepare)

{
	struct cam_ife_hw_mgr_ctx       *ctx = NULL;
	struct cam_isp_hw_mgr_res       *hw_mgr_res;
	struct cam_hw_intf              *hw_intf;
	struct cam_isp_blanking_config  blanking_config;
	int                             rc = 0, i;

	ctx = prepare->ctxt_to_hw_map;
	if (list_empty(&ctx->res_list_ife_src)) {
		CAM_ERR(CAM_ISP, "Mux List empty");
		return -ENODEV;
	}

	list_for_each_entry(hw_mgr_res,
		&ctx->res_list_ife_src, list) {
		for (i = 0; i < CAM_ISP_HW_SPLIT_MAX; i++) {
			if (!hw_mgr_res->hw_res[i])
				continue;

			hw_intf = hw_mgr_res->hw_res[i]->hw_intf;
			blanking_config.node_res = hw_mgr_res->hw_res[i];
			blanking_config.vbi = sensor_blanking_config->vbi;
			blanking_config.hbi = sensor_blanking_config->hbi;

			if (hw_intf && hw_intf->hw_ops.process_cmd) {
				rc = hw_intf->hw_ops.process_cmd(
					hw_intf->hw_priv,
					CAM_ISP_HW_CMD_BLANKING_UPDATE,
					&blanking_config,
					sizeof(
					struct cam_isp_blanking_config));
				if (rc)
					CAM_ERR(CAM_ISP,
						"blanking update failed");
			}
		}
	}
	return rc;
}

static int cam_isp_packet_generic_blob_handler(void *user_data,
	uint32_t blob_type, uint32_t blob_size, uint8_t *blob_data)
{
@@ -6057,6 +6105,25 @@ static int cam_isp_packet_generic_blob_handler(void *user_data,
			CAM_ERR(CAM_ISP, "CSID Config failed rc: %d", rc);
	}
		break;
	case CAM_ISP_GENERIC_BLOB_TYPE_SENSOR_BLANKING_CONFIG: {
		struct cam_isp_sensor_blanking_config  *sensor_blanking_config;

		if (blob_size < sizeof(struct cam_isp_sensor_blanking_config)) {
			CAM_ERR(CAM_ISP, "Invalid blob size %zu expected %zu",
				blob_size,
				sizeof(struct cam_isp_sensor_blanking_config));
			return -EINVAL;
		}
		sensor_blanking_config =
			(struct cam_isp_sensor_blanking_config *)blob_data;

		rc = cam_isp_blob_sensor_blanking_config(blob_type, blob_info,
			sensor_blanking_config, prepare);
		if (rc)
			CAM_ERR(CAM_ISP,
				"Epoch Configuration Update Failed rc:%d", rc);
	}
		break;
	case CAM_ISP_GENERIC_BLOB_TYPE_SENSOR_DIMENSION_CONFIG: {
		struct cam_isp_sensor_config *csid_dim_config;

+15 −0
Original line number Diff line number Diff line
@@ -124,6 +124,7 @@ enum cam_isp_hw_cmd_type {
	CAM_ISP_HW_CMD_UNMASK_BUS_WR_IRQ,
	CAM_ISP_HW_CMD_IS_CONSUMED_ADDR_SUPPORT,
	CAM_ISP_HW_CMD_GET_RES_FOR_MID,
	CAM_ISP_HW_CMD_BLANKING_UPDATE,
	CAM_ISP_HW_CMD_MAX,
};

@@ -178,6 +179,20 @@ struct cam_isp_resource_node {
	CAM_IRQ_HANDLER_BOTTOM_HALF    bottom_half_handler;
};

/*
 * struct cam_isp_blanking_config:
 *
 * @Brief:          Structure to pass blanking details
 * @hbi:            HBI Value
 * @vbi:            VBI Value
 * node_res:        Pointer to Resource Node object
 */
struct cam_isp_blanking_config {
	uint32_t                           hbi;
	uint32_t                           vbi;
	struct cam_isp_resource_node       *node_res;
};

/*
 * struct cam_isp_hw_event_info:
 *
+14 −1
Original line number Diff line number Diff line
@@ -79,6 +79,8 @@ struct cam_tfe_camif_data {
	uint32_t                           camif_debug;
	uint32_t                           camif_pd_enable;
	uint32_t                           dual_tfe_sync_sel;
	uint32_t                           hbi_value;
	uint32_t                           vbi_value;
};

struct cam_tfe_rdi_data {
@@ -265,6 +267,10 @@ static void cam_tfe_log_tfe_in_debug_status(
				"Acquired line start:0x%x line end:0x%x",
				camif_data->first_line,
				camif_data->last_line);
			CAM_INFO(CAM_ISP, "vbi_value:0x%x hbi_value:0x%x",
				camif_data->vbi_value,
				camif_data->hbi_value);

		} else if ((top_priv->in_rsrc[i].res_id >=
			CAM_ISP_HW_TFE_IN_RDI0) ||
			(top_priv->in_rsrc[i].res_id <=
@@ -1815,6 +1821,10 @@ int cam_tfe_top_reserve(void *device_priv,
					acquire_args->in_port->line_start;
				camif_data->last_line =
					acquire_args->in_port->line_end;
				camif_data->vbi_value =
					acquire_args->in_port->sensor_vbi;
				camif_data->hbi_value =
					acquire_args->in_port->sensor_hbi;
				camif_data->camif_pd_enable =
					acquire_args->camif_pd_enable;
				camif_data->dual_tfe_sync_sel =
@@ -1978,9 +1988,12 @@ static int cam_tfe_camif_resource_start(
	}

	/* Epoch config */
	epoch0_irq_mask = ((rsrc_data->last_line -
	epoch0_irq_mask = (((rsrc_data->last_line + rsrc_data->vbi_value) -
			rsrc_data->first_line) / 2) +
			rsrc_data->first_line;
	if (epoch0_irq_mask > rsrc_data->last_line)
		epoch0_irq_mask = rsrc_data->last_line;

	epoch1_irq_mask = rsrc_data->reg_data->epoch_line_cfg &
			0xFFFF;
	computed_epoch_line_cfg = (epoch0_irq_mask << 16) |
+1 −0
Original line number Diff line number Diff line
@@ -601,6 +601,7 @@ int cam_vfe_process_cmd(void *hw_priv, uint32_t cmd_type,
	case CAM_ISP_HW_CMD_ADD_WAIT:
	case CAM_ISP_HW_CMD_ADD_WAIT_TRIGGER:
	case CAM_ISP_HW_CMD_CAMIF_DATA:
	case CAM_ISP_HW_CMD_BLANKING_UPDATE:
		rc = core_info->vfe_top->hw_ops.process_cmd(
			core_info->vfe_top->top_priv, cmd_type, cmd_args,
			arg_size);
+3 −0
Original line number Diff line number Diff line
@@ -371,6 +371,9 @@ static int cam_vfe_camif_lite_process_cmd(
		break;
	case CAM_ISP_HW_CMD_SET_CAMIF_DEBUG:
		break;
	case CAM_ISP_HW_CMD_BLANKING_UPDATE:
		rc = 0;
		break;
	default:
		CAM_ERR(CAM_ISP,
			"unsupported process command:%d", cmd_type);
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