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Commit 64077504 authored by Urvashi Agrawal's avatar Urvashi Agrawal
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msm: kgsl: Add LPAC information to snapshot 



Add some bits of LPAC information to snapshot.

Change-Id: I4786e4817c9fa1fe778ee769c019069923b46024
Signed-off-by: default avatarUrvashi Agrawal <urvaagra@codeaurora.org>
parent 087af65b

drivers/gpu/msm/a6xx_reg.h

+12 −0
Original line number Diff line number Diff line
@@ -119,7 +119,19 @@ 
#define A6XX_VSC_ADDR_MODE_CNTL          0xC01



/* LPAC registers */

#define A6XX_CP_LPAC_DRAW_STATE_ADDR     0xB0A

#define A6XX_CP_LPAC_DRAW_STATE_DATA     0xB0B

#define A6XX_CP_LPAC_ROQ_DBG_ADDR        0xB0C

#define A6XX_CP_SQE_AC_UCODE_DBG_ADDR    0xB27

#define A6XX_CP_SQE_AC_UCODE_DBG_DATA    0xB28

#define A6XX_CP_SQE_AC_STAT_ADDR         0xB29

#define A6XX_CP_SQE_AC_STAT_DATA         0xB2A

#define A6XX_CP_LPAC_ROQ_THRESHOLDS_1    0xB32

#define A6XX_CP_LPAC_ROQ_THRESHOLDS_2    0xB33

#define A6XX_CP_LPAC_PROG_FIFO_SIZE      0xB34

#define A6XX_CP_LPAC_ROQ_DBG_DATA        0xB35

#define A6XX_CP_LPAC_FIFO_DBG_DATA       0xB36

#define A6XX_CP_LPAC_FIFO_DBG_ADDR       0xB40



/* RBBM registers */

#define A6XX_RBBM_INT_0_STATUS                   0x201

drivers/gpu/msm/adreno_a6xx_gmu_snapshot.c

+2 −0
Original line number Diff line number Diff line
@@ -55,6 +55,8 @@ static const unsigned int a660_gmu_registers[] = { 
	0x1F966, 0x1F96B, 0x1F970, 0x1F970, 0x1F972, 0x1F979, 0x1F9CD, 0x1F9D4,

	0x1FA02, 0x1FA03, 0x20000, 0x20001, 0x20004, 0x20004, 0x20008, 0x20012,

	0x20018, 0x20018,

	/* GMU AO LPAC */

	0x23B30, 0x23B30,

};



static const unsigned int a630_rscc_snapshot_registers[] = {

drivers/gpu/msm/adreno_a6xx_snapshot.c

+26 −0
Original line number Diff line number Diff line
@@ -311,6 +311,10 @@ static const unsigned int a6xx_registers[] = { 
static const unsigned int a660_registers[] = {

	/* UCHE */

	0x0E3C, 0x0E3C,

	/* LPAC RBBM */

	0x05FC, 0x05FF,

	/* LPAC CP */

	0x0B00, 0x0B40, 0x0B80, 0x0B83,

};



/*
@@ -1839,6 +1843,28 @@ void a6xx_snapshot(struct adreno_device *adreno_dev, 
		A6XX_CP_SQE_UCODE_DBG_ADDR, A6XX_CP_SQE_UCODE_DBG_DATA,

		0, 0x8000);



	/* CP LPAC indexed registers */

	if (adreno_is_a660(adreno_dev)) {

		kgsl_snapshot_indexed_registers(device, snapshot,

			 A6XX_CP_SQE_AC_STAT_ADDR, A6XX_CP_SQE_AC_STAT_DATA,

				0, 0x33);

		kgsl_snapshot_indexed_registers(device, snapshot,

			A6XX_CP_LPAC_DRAW_STATE_ADDR,

				A6XX_CP_LPAC_DRAW_STATE_DATA, 0, 0x100);

		kgsl_snapshot_indexed_registers(device, snapshot,

			A6XX_CP_SQE_AC_UCODE_DBG_ADDR,

				A6XX_CP_SQE_AC_UCODE_DBG_DATA, 0, 0x8000);



		kgsl_regread(device, A6XX_CP_LPAC_ROQ_THRESHOLDS_2, &roq_size);

		roq_size = roq_size >> 14;

		kgsl_snapshot_indexed_registers(device, snapshot,

			A6XX_CP_LPAC_ROQ_DBG_ADDR,

				A6XX_CP_LPAC_ROQ_DBG_DATA, 0, roq_size);



		kgsl_snapshot_indexed_registers(device, snapshot,

			A6XX_CP_LPAC_FIFO_DBG_ADDR, A6XX_CP_LPAC_FIFO_DBG_DATA,

			0, 0x40);

	}

	/*

	 * CP ROQ dump units is 4dwords. The number of units is stored

	 * in CP_ROQ_THRESHOLDS_2[31:16]. Read the value and convert to