Loading drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv31.c +36 −32 Original line number Diff line number Diff line Loading @@ -59,8 +59,9 @@ nv31_mpeg_object_ctor(struct nvkm_object *parent, static int nv31_mpeg_mthd_dma(struct nvkm_object *object, u32 mthd, void *arg, u32 len) { struct nvkm_instmem *imem = nvkm_instmem(object); struct nv31_mpeg *mpeg = (void *)object->engine; struct nvkm_device *device = mpeg->base.engine.subdev.device; struct nvkm_instmem *imem = device->imem; u32 inst = *(u32 *)arg << 4; u32 dma0 = nv_ro32(imem, inst + 0); u32 dma1 = nv_ro32(imem, inst + 4); Loading @@ -74,22 +75,22 @@ nv31_mpeg_mthd_dma(struct nvkm_object *object, u32 mthd, void *arg, u32 len) if (mthd == 0x0190) { /* DMA_CMD */ nv_mask(mpeg, 0x00b300, 0x00010000, (dma0 & 0x00030000) ? 0x00010000 : 0); nv_wr32(mpeg, 0x00b334, base); nv_wr32(mpeg, 0x00b324, size); nvkm_mask(device, 0x00b300, 0x00010000, (dma0 & 0x00030000) ? 0x00010000 : 0); nvkm_wr32(device, 0x00b334, base); nvkm_wr32(device, 0x00b324, size); } else if (mthd == 0x01a0) { /* DMA_DATA */ nv_mask(mpeg, 0x00b300, 0x00020000, (dma0 & 0x00030000) ? 0x00020000 : 0); nv_wr32(mpeg, 0x00b360, base); nv_wr32(mpeg, 0x00b364, size); nvkm_mask(device, 0x00b300, 0x00020000, (dma0 & 0x00030000) ? 0x00020000 : 0); nvkm_wr32(device, 0x00b360, base); nvkm_wr32(device, 0x00b364, size); } else { /* DMA_IMAGE, VRAM only */ if (dma0 & 0x00030000) return -EINVAL; nv_wr32(mpeg, 0x00b370, base); nv_wr32(mpeg, 0x00b374, size); nvkm_wr32(device, 0x00b370, base); nvkm_wr32(device, 0x00b374, size); } return 0; Loading Loading @@ -182,25 +183,27 @@ nv31_mpeg_cclass = { void nv31_mpeg_tile_prog(struct nvkm_engine *engine, int i) { struct nvkm_fb_tile *tile = &nvkm_fb(engine)->tile.region[i]; struct nv31_mpeg *mpeg = (void *)engine; struct nvkm_device *device = mpeg->base.engine.subdev.device; struct nvkm_fb_tile *tile = &device->fb->tile.region[i]; nv_wr32(mpeg, 0x00b008 + (i * 0x10), tile->pitch); nv_wr32(mpeg, 0x00b004 + (i * 0x10), tile->limit); nv_wr32(mpeg, 0x00b000 + (i * 0x10), tile->addr); nvkm_wr32(device, 0x00b008 + (i * 0x10), tile->pitch); nvkm_wr32(device, 0x00b004 + (i * 0x10), tile->limit); nvkm_wr32(device, 0x00b000 + (i * 0x10), tile->addr); } void nv31_mpeg_intr(struct nvkm_subdev *subdev) { struct nv31_mpeg *mpeg = (void *)subdev; struct nvkm_fifo *fifo = nvkm_fifo(subdev); struct nvkm_device *device = mpeg->base.engine.subdev.device; struct nvkm_fifo *fifo = device->fifo; struct nvkm_handle *handle; struct nvkm_object *engctx; u32 stat = nv_rd32(mpeg, 0x00b100); u32 type = nv_rd32(mpeg, 0x00b230); u32 mthd = nv_rd32(mpeg, 0x00b234); u32 data = nv_rd32(mpeg, 0x00b238); u32 stat = nvkm_rd32(device, 0x00b100); u32 type = nvkm_rd32(device, 0x00b230); u32 mthd = nvkm_rd32(device, 0x00b234); u32 data = nvkm_rd32(device, 0x00b238); u32 show = stat; unsigned long flags; Loading @@ -210,7 +213,7 @@ nv31_mpeg_intr(struct nvkm_subdev *subdev) if (stat & 0x01000000) { /* happens on initial binding of the object */ if (type == 0x00000020 && mthd == 0x0000) { nv_mask(mpeg, 0x00b308, 0x00000000, 0x00000000); nvkm_mask(device, 0x00b308, 0x00000000, 0x00000000); show &= ~0x01000000; } Loading @@ -222,8 +225,8 @@ nv31_mpeg_intr(struct nvkm_subdev *subdev) } } nv_wr32(mpeg, 0x00b100, stat); nv_wr32(mpeg, 0x00b230, 0x00000001); nvkm_wr32(device, 0x00b100, stat); nvkm_wr32(device, 0x00b230, 0x00000001); if (show) { nv_error(mpeg, "ch %d [%s] 0x%08x 0x%08x 0x%08x 0x%08x\n", Loading Loading @@ -260,7 +263,8 @@ nv31_mpeg_init(struct nvkm_object *object) { struct nvkm_engine *engine = nv_engine(object); struct nv31_mpeg *mpeg = (void *)object; struct nvkm_fb *fb = nvkm_fb(object); struct nvkm_device *device = mpeg->base.engine.subdev.device; struct nvkm_fb *fb = device->fb; int ret, i; ret = nvkm_mpeg_init(&mpeg->base); Loading @@ -268,24 +272,24 @@ nv31_mpeg_init(struct nvkm_object *object) return ret; /* VPE init */ nv_wr32(mpeg, 0x00b0e0, 0x00000020); /* nvidia: rd 0x01, wr 0x20 */ nv_wr32(mpeg, 0x00b0e8, 0x00000020); /* nvidia: rd 0x01, wr 0x20 */ nvkm_wr32(device, 0x00b0e0, 0x00000020); /* nvidia: rd 0x01, wr 0x20 */ nvkm_wr32(device, 0x00b0e8, 0x00000020); /* nvidia: rd 0x01, wr 0x20 */ for (i = 0; i < fb->tile.regions; i++) engine->tile_prog(engine, i); /* PMPEG init */ nv_wr32(mpeg, 0x00b32c, 0x00000000); nv_wr32(mpeg, 0x00b314, 0x00000100); nv_wr32(mpeg, 0x00b220, 0x00000031); nv_wr32(mpeg, 0x00b300, 0x02001ec1); nv_mask(mpeg, 0x00b32c, 0x00000001, 0x00000001); nvkm_wr32(device, 0x00b32c, 0x00000000); nvkm_wr32(device, 0x00b314, 0x00000100); nvkm_wr32(device, 0x00b220, 0x00000031); nvkm_wr32(device, 0x00b300, 0x02001ec1); nvkm_mask(device, 0x00b32c, 0x00000001, 0x00000001); nv_wr32(mpeg, 0x00b100, 0xffffffff); nv_wr32(mpeg, 0x00b140, 0xffffffff); nvkm_wr32(device, 0x00b100, 0xffffffff); nvkm_wr32(device, 0x00b140, 0xffffffff); if (!nv_wait(mpeg, 0x00b200, 0x00000001, 0x00000000)) { nv_error(mpeg, "timeout 0x%08x\n", nv_rd32(mpeg, 0x00b200)); nv_error(mpeg, "timeout 0x%08x\n", nvkm_rd32(device, 0x00b200)); return -EBUSY; } Loading drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv40.c +14 −12 Original line number Diff line number Diff line Loading @@ -32,8 +32,9 @@ static int nv40_mpeg_mthd_dma(struct nvkm_object *object, u32 mthd, void *arg, u32 len) { struct nvkm_instmem *imem = nvkm_instmem(object); struct nv31_mpeg *mpeg = (void *)object->engine; struct nvkm_device *device = mpeg->base.engine.subdev.device; struct nvkm_instmem *imem = device->imem; u32 inst = *(u32 *)arg << 4; u32 dma0 = nv_ro32(imem, inst + 0); u32 dma1 = nv_ro32(imem, inst + 4); Loading @@ -47,22 +48,22 @@ nv40_mpeg_mthd_dma(struct nvkm_object *object, u32 mthd, void *arg, u32 len) if (mthd == 0x0190) { /* DMA_CMD */ nv_mask(mpeg, 0x00b300, 0x00030000, (dma0 & 0x00030000)); nv_wr32(mpeg, 0x00b334, base); nv_wr32(mpeg, 0x00b324, size); nvkm_mask(device, 0x00b300, 0x00030000, (dma0 & 0x00030000)); nvkm_wr32(device, 0x00b334, base); nvkm_wr32(device, 0x00b324, size); } else if (mthd == 0x01a0) { /* DMA_DATA */ nv_mask(mpeg, 0x00b300, 0x000c0000, (dma0 & 0x00030000) << 2); nv_wr32(mpeg, 0x00b360, base); nv_wr32(mpeg, 0x00b364, size); nvkm_mask(device, 0x00b300, 0x000c0000, (dma0 & 0x00030000) << 2); nvkm_wr32(device, 0x00b360, base); nvkm_wr32(device, 0x00b364, size); } else { /* DMA_IMAGE, VRAM only */ if (dma0 & 0x00030000) return -EINVAL; nv_wr32(mpeg, 0x00b370, base); nv_wr32(mpeg, 0x00b374, size); nvkm_wr32(device, 0x00b370, base); nvkm_wr32(device, 0x00b374, size); } return 0; Loading Loading @@ -90,14 +91,15 @@ static void nv40_mpeg_intr(struct nvkm_subdev *subdev) { struct nv31_mpeg *mpeg = (void *)subdev; struct nvkm_device *device = mpeg->base.engine.subdev.device; u32 stat; if ((stat = nv_rd32(mpeg, 0x00b100))) if ((stat = nvkm_rd32(device, 0x00b100))) nv31_mpeg_intr(subdev); if ((stat = nv_rd32(mpeg, 0x00b800))) { if ((stat = nvkm_rd32(device, 0x00b800))) { nv_error(mpeg, "PMSRCH 0x%08x\n", stat); nv_wr32(mpeg, 0x00b800, stat); nvkm_wr32(device, 0x00b800, stat); } } Loading drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv44.c +20 −17 Original line number Diff line number Diff line Loading @@ -60,12 +60,13 @@ nv44_mpeg_context_fini(struct nvkm_object *object, bool suspend) struct nvkm_mpeg *mpeg = (void *)object->engine; struct nv44_mpeg_chan *chan = (void *)object; struct nvkm_device *device = mpeg->engine.subdev.device; u32 inst = 0x80000000 | nv_gpuobj(chan)->addr >> 4; nv_mask(mpeg, 0x00b32c, 0x00000001, 0x00000000); if (nv_rd32(mpeg, 0x00b318) == inst) nv_mask(mpeg, 0x00b318, 0x80000000, 0x00000000); nv_mask(mpeg, 0x00b32c, 0x00000001, 0x00000001); nvkm_mask(device, 0x00b32c, 0x00000001, 0x00000000); if (nvkm_rd32(device, 0x00b318) == inst) nvkm_mask(device, 0x00b318, 0x80000000, 0x00000000); nvkm_mask(device, 0x00b32c, 0x00000001, 0x00000001); return 0; } Loading @@ -89,16 +90,17 @@ nv44_mpeg_cclass = { static void nv44_mpeg_intr(struct nvkm_subdev *subdev) { struct nvkm_fifo *fifo = nvkm_fifo(subdev); struct nvkm_mpeg *mpeg = (void *)subdev; struct nvkm_device *device = mpeg->engine.subdev.device; struct nvkm_fifo *fifo = device->fifo; struct nvkm_engine *engine = nv_engine(subdev); struct nvkm_object *engctx; struct nvkm_handle *handle; struct nvkm_mpeg *mpeg = (void *)subdev; u32 inst = nv_rd32(mpeg, 0x00b318) & 0x000fffff; u32 stat = nv_rd32(mpeg, 0x00b100); u32 type = nv_rd32(mpeg, 0x00b230); u32 mthd = nv_rd32(mpeg, 0x00b234); u32 data = nv_rd32(mpeg, 0x00b238); u32 inst = nvkm_rd32(device, 0x00b318) & 0x000fffff; u32 stat = nvkm_rd32(device, 0x00b100); u32 type = nvkm_rd32(device, 0x00b230); u32 mthd = nvkm_rd32(device, 0x00b234); u32 data = nvkm_rd32(device, 0x00b238); u32 show = stat; int chid; Loading @@ -108,7 +110,7 @@ nv44_mpeg_intr(struct nvkm_subdev *subdev) if (stat & 0x01000000) { /* happens on initial binding of the object */ if (type == 0x00000020 && mthd == 0x0000) { nv_mask(mpeg, 0x00b308, 0x00000000, 0x00000000); nvkm_mask(device, 0x00b308, 0x00000000, 0x00000000); show &= ~0x01000000; } Loading @@ -120,8 +122,8 @@ nv44_mpeg_intr(struct nvkm_subdev *subdev) } } nv_wr32(mpeg, 0x00b100, stat); nv_wr32(mpeg, 0x00b230, 0x00000001); nvkm_wr32(device, 0x00b100, stat); nvkm_wr32(device, 0x00b230, 0x00000001); if (show) { nv_error(mpeg, Loading @@ -137,14 +139,15 @@ static void nv44_mpeg_me_intr(struct nvkm_subdev *subdev) { struct nvkm_mpeg *mpeg = (void *)subdev; struct nvkm_device *device = mpeg->engine.subdev.device; u32 stat; if ((stat = nv_rd32(mpeg, 0x00b100))) if ((stat = nvkm_rd32(device, 0x00b100))) nv44_mpeg_intr(subdev); if ((stat = nv_rd32(mpeg, 0x00b800))) { if ((stat = nvkm_rd32(device, 0x00b800))) { nv_error(mpeg, "PMSRCH 0x%08x\n", stat); nv_wr32(mpeg, 0x00b800, stat); nvkm_wr32(device, 0x00b800, stat); } } Loading drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv50.c +26 −23 Original line number Diff line number Diff line Loading @@ -119,16 +119,17 @@ void nv50_mpeg_intr(struct nvkm_subdev *subdev) { struct nvkm_mpeg *mpeg = (void *)subdev; u32 stat = nv_rd32(mpeg, 0x00b100); u32 type = nv_rd32(mpeg, 0x00b230); u32 mthd = nv_rd32(mpeg, 0x00b234); u32 data = nv_rd32(mpeg, 0x00b238); struct nvkm_device *device = mpeg->engine.subdev.device; u32 stat = nvkm_rd32(device, 0x00b100); u32 type = nvkm_rd32(device, 0x00b230); u32 mthd = nvkm_rd32(device, 0x00b234); u32 data = nvkm_rd32(device, 0x00b238); u32 show = stat; if (stat & 0x01000000) { /* happens on initial binding of the object */ if (type == 0x00000020 && mthd == 0x0000) { nv_wr32(mpeg, 0x00b308, 0x00000100); nvkm_wr32(device, 0x00b308, 0x00000100); show &= ~0x01000000; } } Loading @@ -138,22 +139,23 @@ nv50_mpeg_intr(struct nvkm_subdev *subdev) stat, type, mthd, data); } nv_wr32(mpeg, 0x00b100, stat); nv_wr32(mpeg, 0x00b230, 0x00000001); nvkm_wr32(device, 0x00b100, stat); nvkm_wr32(device, 0x00b230, 0x00000001); } static void nv50_vpe_intr(struct nvkm_subdev *subdev) { struct nvkm_mpeg *mpeg = (void *)subdev; struct nvkm_device *device = mpeg->engine.subdev.device; if (nv_rd32(mpeg, 0x00b100)) if (nvkm_rd32(device, 0x00b100)) nv50_mpeg_intr(subdev); if (nv_rd32(mpeg, 0x00b800)) { u32 stat = nv_rd32(mpeg, 0x00b800); if (nvkm_rd32(device, 0x00b800)) { u32 stat = nvkm_rd32(device, 0x00b800); nv_info(mpeg, "PMSRCH: 0x%08x\n", stat); nv_wr32(mpeg, 0xb800, stat); nvkm_wr32(device, 0xb800, stat); } } Loading Loading @@ -181,28 +183,29 @@ int nv50_mpeg_init(struct nvkm_object *object) { struct nvkm_mpeg *mpeg = (void *)object; struct nvkm_device *device = mpeg->engine.subdev.device; int ret; ret = nvkm_mpeg_init(mpeg); if (ret) return ret; nv_wr32(mpeg, 0x00b32c, 0x00000000); nv_wr32(mpeg, 0x00b314, 0x00000100); nv_wr32(mpeg, 0x00b0e0, 0x0000001a); nvkm_wr32(device, 0x00b32c, 0x00000000); nvkm_wr32(device, 0x00b314, 0x00000100); nvkm_wr32(device, 0x00b0e0, 0x0000001a); nv_wr32(mpeg, 0x00b220, 0x00000044); nv_wr32(mpeg, 0x00b300, 0x00801ec1); nv_wr32(mpeg, 0x00b390, 0x00000000); nv_wr32(mpeg, 0x00b394, 0x00000000); nv_wr32(mpeg, 0x00b398, 0x00000000); nv_mask(mpeg, 0x00b32c, 0x00000001, 0x00000001); nvkm_wr32(device, 0x00b220, 0x00000044); nvkm_wr32(device, 0x00b300, 0x00801ec1); nvkm_wr32(device, 0x00b390, 0x00000000); nvkm_wr32(device, 0x00b394, 0x00000000); nvkm_wr32(device, 0x00b398, 0x00000000); nvkm_mask(device, 0x00b32c, 0x00000001, 0x00000001); nv_wr32(mpeg, 0x00b100, 0xffffffff); nv_wr32(mpeg, 0x00b140, 0xffffffff); nvkm_wr32(device, 0x00b100, 0xffffffff); nvkm_wr32(device, 0x00b140, 0xffffffff); if (!nv_wait(mpeg, 0x00b200, 0x00000001, 0x00000000)) { nv_error(mpeg, "timeout 0x%08x\n", nv_rd32(mpeg, 0x00b200)); nv_error(mpeg, "timeout 0x%08x\n", nvkm_rd32(device, 0x00b200)); return -EBUSY; } Loading Loading
drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv31.c +36 −32 Original line number Diff line number Diff line Loading @@ -59,8 +59,9 @@ nv31_mpeg_object_ctor(struct nvkm_object *parent, static int nv31_mpeg_mthd_dma(struct nvkm_object *object, u32 mthd, void *arg, u32 len) { struct nvkm_instmem *imem = nvkm_instmem(object); struct nv31_mpeg *mpeg = (void *)object->engine; struct nvkm_device *device = mpeg->base.engine.subdev.device; struct nvkm_instmem *imem = device->imem; u32 inst = *(u32 *)arg << 4; u32 dma0 = nv_ro32(imem, inst + 0); u32 dma1 = nv_ro32(imem, inst + 4); Loading @@ -74,22 +75,22 @@ nv31_mpeg_mthd_dma(struct nvkm_object *object, u32 mthd, void *arg, u32 len) if (mthd == 0x0190) { /* DMA_CMD */ nv_mask(mpeg, 0x00b300, 0x00010000, (dma0 & 0x00030000) ? 0x00010000 : 0); nv_wr32(mpeg, 0x00b334, base); nv_wr32(mpeg, 0x00b324, size); nvkm_mask(device, 0x00b300, 0x00010000, (dma0 & 0x00030000) ? 0x00010000 : 0); nvkm_wr32(device, 0x00b334, base); nvkm_wr32(device, 0x00b324, size); } else if (mthd == 0x01a0) { /* DMA_DATA */ nv_mask(mpeg, 0x00b300, 0x00020000, (dma0 & 0x00030000) ? 0x00020000 : 0); nv_wr32(mpeg, 0x00b360, base); nv_wr32(mpeg, 0x00b364, size); nvkm_mask(device, 0x00b300, 0x00020000, (dma0 & 0x00030000) ? 0x00020000 : 0); nvkm_wr32(device, 0x00b360, base); nvkm_wr32(device, 0x00b364, size); } else { /* DMA_IMAGE, VRAM only */ if (dma0 & 0x00030000) return -EINVAL; nv_wr32(mpeg, 0x00b370, base); nv_wr32(mpeg, 0x00b374, size); nvkm_wr32(device, 0x00b370, base); nvkm_wr32(device, 0x00b374, size); } return 0; Loading Loading @@ -182,25 +183,27 @@ nv31_mpeg_cclass = { void nv31_mpeg_tile_prog(struct nvkm_engine *engine, int i) { struct nvkm_fb_tile *tile = &nvkm_fb(engine)->tile.region[i]; struct nv31_mpeg *mpeg = (void *)engine; struct nvkm_device *device = mpeg->base.engine.subdev.device; struct nvkm_fb_tile *tile = &device->fb->tile.region[i]; nv_wr32(mpeg, 0x00b008 + (i * 0x10), tile->pitch); nv_wr32(mpeg, 0x00b004 + (i * 0x10), tile->limit); nv_wr32(mpeg, 0x00b000 + (i * 0x10), tile->addr); nvkm_wr32(device, 0x00b008 + (i * 0x10), tile->pitch); nvkm_wr32(device, 0x00b004 + (i * 0x10), tile->limit); nvkm_wr32(device, 0x00b000 + (i * 0x10), tile->addr); } void nv31_mpeg_intr(struct nvkm_subdev *subdev) { struct nv31_mpeg *mpeg = (void *)subdev; struct nvkm_fifo *fifo = nvkm_fifo(subdev); struct nvkm_device *device = mpeg->base.engine.subdev.device; struct nvkm_fifo *fifo = device->fifo; struct nvkm_handle *handle; struct nvkm_object *engctx; u32 stat = nv_rd32(mpeg, 0x00b100); u32 type = nv_rd32(mpeg, 0x00b230); u32 mthd = nv_rd32(mpeg, 0x00b234); u32 data = nv_rd32(mpeg, 0x00b238); u32 stat = nvkm_rd32(device, 0x00b100); u32 type = nvkm_rd32(device, 0x00b230); u32 mthd = nvkm_rd32(device, 0x00b234); u32 data = nvkm_rd32(device, 0x00b238); u32 show = stat; unsigned long flags; Loading @@ -210,7 +213,7 @@ nv31_mpeg_intr(struct nvkm_subdev *subdev) if (stat & 0x01000000) { /* happens on initial binding of the object */ if (type == 0x00000020 && mthd == 0x0000) { nv_mask(mpeg, 0x00b308, 0x00000000, 0x00000000); nvkm_mask(device, 0x00b308, 0x00000000, 0x00000000); show &= ~0x01000000; } Loading @@ -222,8 +225,8 @@ nv31_mpeg_intr(struct nvkm_subdev *subdev) } } nv_wr32(mpeg, 0x00b100, stat); nv_wr32(mpeg, 0x00b230, 0x00000001); nvkm_wr32(device, 0x00b100, stat); nvkm_wr32(device, 0x00b230, 0x00000001); if (show) { nv_error(mpeg, "ch %d [%s] 0x%08x 0x%08x 0x%08x 0x%08x\n", Loading Loading @@ -260,7 +263,8 @@ nv31_mpeg_init(struct nvkm_object *object) { struct nvkm_engine *engine = nv_engine(object); struct nv31_mpeg *mpeg = (void *)object; struct nvkm_fb *fb = nvkm_fb(object); struct nvkm_device *device = mpeg->base.engine.subdev.device; struct nvkm_fb *fb = device->fb; int ret, i; ret = nvkm_mpeg_init(&mpeg->base); Loading @@ -268,24 +272,24 @@ nv31_mpeg_init(struct nvkm_object *object) return ret; /* VPE init */ nv_wr32(mpeg, 0x00b0e0, 0x00000020); /* nvidia: rd 0x01, wr 0x20 */ nv_wr32(mpeg, 0x00b0e8, 0x00000020); /* nvidia: rd 0x01, wr 0x20 */ nvkm_wr32(device, 0x00b0e0, 0x00000020); /* nvidia: rd 0x01, wr 0x20 */ nvkm_wr32(device, 0x00b0e8, 0x00000020); /* nvidia: rd 0x01, wr 0x20 */ for (i = 0; i < fb->tile.regions; i++) engine->tile_prog(engine, i); /* PMPEG init */ nv_wr32(mpeg, 0x00b32c, 0x00000000); nv_wr32(mpeg, 0x00b314, 0x00000100); nv_wr32(mpeg, 0x00b220, 0x00000031); nv_wr32(mpeg, 0x00b300, 0x02001ec1); nv_mask(mpeg, 0x00b32c, 0x00000001, 0x00000001); nvkm_wr32(device, 0x00b32c, 0x00000000); nvkm_wr32(device, 0x00b314, 0x00000100); nvkm_wr32(device, 0x00b220, 0x00000031); nvkm_wr32(device, 0x00b300, 0x02001ec1); nvkm_mask(device, 0x00b32c, 0x00000001, 0x00000001); nv_wr32(mpeg, 0x00b100, 0xffffffff); nv_wr32(mpeg, 0x00b140, 0xffffffff); nvkm_wr32(device, 0x00b100, 0xffffffff); nvkm_wr32(device, 0x00b140, 0xffffffff); if (!nv_wait(mpeg, 0x00b200, 0x00000001, 0x00000000)) { nv_error(mpeg, "timeout 0x%08x\n", nv_rd32(mpeg, 0x00b200)); nv_error(mpeg, "timeout 0x%08x\n", nvkm_rd32(device, 0x00b200)); return -EBUSY; } Loading
drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv40.c +14 −12 Original line number Diff line number Diff line Loading @@ -32,8 +32,9 @@ static int nv40_mpeg_mthd_dma(struct nvkm_object *object, u32 mthd, void *arg, u32 len) { struct nvkm_instmem *imem = nvkm_instmem(object); struct nv31_mpeg *mpeg = (void *)object->engine; struct nvkm_device *device = mpeg->base.engine.subdev.device; struct nvkm_instmem *imem = device->imem; u32 inst = *(u32 *)arg << 4; u32 dma0 = nv_ro32(imem, inst + 0); u32 dma1 = nv_ro32(imem, inst + 4); Loading @@ -47,22 +48,22 @@ nv40_mpeg_mthd_dma(struct nvkm_object *object, u32 mthd, void *arg, u32 len) if (mthd == 0x0190) { /* DMA_CMD */ nv_mask(mpeg, 0x00b300, 0x00030000, (dma0 & 0x00030000)); nv_wr32(mpeg, 0x00b334, base); nv_wr32(mpeg, 0x00b324, size); nvkm_mask(device, 0x00b300, 0x00030000, (dma0 & 0x00030000)); nvkm_wr32(device, 0x00b334, base); nvkm_wr32(device, 0x00b324, size); } else if (mthd == 0x01a0) { /* DMA_DATA */ nv_mask(mpeg, 0x00b300, 0x000c0000, (dma0 & 0x00030000) << 2); nv_wr32(mpeg, 0x00b360, base); nv_wr32(mpeg, 0x00b364, size); nvkm_mask(device, 0x00b300, 0x000c0000, (dma0 & 0x00030000) << 2); nvkm_wr32(device, 0x00b360, base); nvkm_wr32(device, 0x00b364, size); } else { /* DMA_IMAGE, VRAM only */ if (dma0 & 0x00030000) return -EINVAL; nv_wr32(mpeg, 0x00b370, base); nv_wr32(mpeg, 0x00b374, size); nvkm_wr32(device, 0x00b370, base); nvkm_wr32(device, 0x00b374, size); } return 0; Loading Loading @@ -90,14 +91,15 @@ static void nv40_mpeg_intr(struct nvkm_subdev *subdev) { struct nv31_mpeg *mpeg = (void *)subdev; struct nvkm_device *device = mpeg->base.engine.subdev.device; u32 stat; if ((stat = nv_rd32(mpeg, 0x00b100))) if ((stat = nvkm_rd32(device, 0x00b100))) nv31_mpeg_intr(subdev); if ((stat = nv_rd32(mpeg, 0x00b800))) { if ((stat = nvkm_rd32(device, 0x00b800))) { nv_error(mpeg, "PMSRCH 0x%08x\n", stat); nv_wr32(mpeg, 0x00b800, stat); nvkm_wr32(device, 0x00b800, stat); } } Loading
drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv44.c +20 −17 Original line number Diff line number Diff line Loading @@ -60,12 +60,13 @@ nv44_mpeg_context_fini(struct nvkm_object *object, bool suspend) struct nvkm_mpeg *mpeg = (void *)object->engine; struct nv44_mpeg_chan *chan = (void *)object; struct nvkm_device *device = mpeg->engine.subdev.device; u32 inst = 0x80000000 | nv_gpuobj(chan)->addr >> 4; nv_mask(mpeg, 0x00b32c, 0x00000001, 0x00000000); if (nv_rd32(mpeg, 0x00b318) == inst) nv_mask(mpeg, 0x00b318, 0x80000000, 0x00000000); nv_mask(mpeg, 0x00b32c, 0x00000001, 0x00000001); nvkm_mask(device, 0x00b32c, 0x00000001, 0x00000000); if (nvkm_rd32(device, 0x00b318) == inst) nvkm_mask(device, 0x00b318, 0x80000000, 0x00000000); nvkm_mask(device, 0x00b32c, 0x00000001, 0x00000001); return 0; } Loading @@ -89,16 +90,17 @@ nv44_mpeg_cclass = { static void nv44_mpeg_intr(struct nvkm_subdev *subdev) { struct nvkm_fifo *fifo = nvkm_fifo(subdev); struct nvkm_mpeg *mpeg = (void *)subdev; struct nvkm_device *device = mpeg->engine.subdev.device; struct nvkm_fifo *fifo = device->fifo; struct nvkm_engine *engine = nv_engine(subdev); struct nvkm_object *engctx; struct nvkm_handle *handle; struct nvkm_mpeg *mpeg = (void *)subdev; u32 inst = nv_rd32(mpeg, 0x00b318) & 0x000fffff; u32 stat = nv_rd32(mpeg, 0x00b100); u32 type = nv_rd32(mpeg, 0x00b230); u32 mthd = nv_rd32(mpeg, 0x00b234); u32 data = nv_rd32(mpeg, 0x00b238); u32 inst = nvkm_rd32(device, 0x00b318) & 0x000fffff; u32 stat = nvkm_rd32(device, 0x00b100); u32 type = nvkm_rd32(device, 0x00b230); u32 mthd = nvkm_rd32(device, 0x00b234); u32 data = nvkm_rd32(device, 0x00b238); u32 show = stat; int chid; Loading @@ -108,7 +110,7 @@ nv44_mpeg_intr(struct nvkm_subdev *subdev) if (stat & 0x01000000) { /* happens on initial binding of the object */ if (type == 0x00000020 && mthd == 0x0000) { nv_mask(mpeg, 0x00b308, 0x00000000, 0x00000000); nvkm_mask(device, 0x00b308, 0x00000000, 0x00000000); show &= ~0x01000000; } Loading @@ -120,8 +122,8 @@ nv44_mpeg_intr(struct nvkm_subdev *subdev) } } nv_wr32(mpeg, 0x00b100, stat); nv_wr32(mpeg, 0x00b230, 0x00000001); nvkm_wr32(device, 0x00b100, stat); nvkm_wr32(device, 0x00b230, 0x00000001); if (show) { nv_error(mpeg, Loading @@ -137,14 +139,15 @@ static void nv44_mpeg_me_intr(struct nvkm_subdev *subdev) { struct nvkm_mpeg *mpeg = (void *)subdev; struct nvkm_device *device = mpeg->engine.subdev.device; u32 stat; if ((stat = nv_rd32(mpeg, 0x00b100))) if ((stat = nvkm_rd32(device, 0x00b100))) nv44_mpeg_intr(subdev); if ((stat = nv_rd32(mpeg, 0x00b800))) { if ((stat = nvkm_rd32(device, 0x00b800))) { nv_error(mpeg, "PMSRCH 0x%08x\n", stat); nv_wr32(mpeg, 0x00b800, stat); nvkm_wr32(device, 0x00b800, stat); } } Loading
drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv50.c +26 −23 Original line number Diff line number Diff line Loading @@ -119,16 +119,17 @@ void nv50_mpeg_intr(struct nvkm_subdev *subdev) { struct nvkm_mpeg *mpeg = (void *)subdev; u32 stat = nv_rd32(mpeg, 0x00b100); u32 type = nv_rd32(mpeg, 0x00b230); u32 mthd = nv_rd32(mpeg, 0x00b234); u32 data = nv_rd32(mpeg, 0x00b238); struct nvkm_device *device = mpeg->engine.subdev.device; u32 stat = nvkm_rd32(device, 0x00b100); u32 type = nvkm_rd32(device, 0x00b230); u32 mthd = nvkm_rd32(device, 0x00b234); u32 data = nvkm_rd32(device, 0x00b238); u32 show = stat; if (stat & 0x01000000) { /* happens on initial binding of the object */ if (type == 0x00000020 && mthd == 0x0000) { nv_wr32(mpeg, 0x00b308, 0x00000100); nvkm_wr32(device, 0x00b308, 0x00000100); show &= ~0x01000000; } } Loading @@ -138,22 +139,23 @@ nv50_mpeg_intr(struct nvkm_subdev *subdev) stat, type, mthd, data); } nv_wr32(mpeg, 0x00b100, stat); nv_wr32(mpeg, 0x00b230, 0x00000001); nvkm_wr32(device, 0x00b100, stat); nvkm_wr32(device, 0x00b230, 0x00000001); } static void nv50_vpe_intr(struct nvkm_subdev *subdev) { struct nvkm_mpeg *mpeg = (void *)subdev; struct nvkm_device *device = mpeg->engine.subdev.device; if (nv_rd32(mpeg, 0x00b100)) if (nvkm_rd32(device, 0x00b100)) nv50_mpeg_intr(subdev); if (nv_rd32(mpeg, 0x00b800)) { u32 stat = nv_rd32(mpeg, 0x00b800); if (nvkm_rd32(device, 0x00b800)) { u32 stat = nvkm_rd32(device, 0x00b800); nv_info(mpeg, "PMSRCH: 0x%08x\n", stat); nv_wr32(mpeg, 0xb800, stat); nvkm_wr32(device, 0xb800, stat); } } Loading Loading @@ -181,28 +183,29 @@ int nv50_mpeg_init(struct nvkm_object *object) { struct nvkm_mpeg *mpeg = (void *)object; struct nvkm_device *device = mpeg->engine.subdev.device; int ret; ret = nvkm_mpeg_init(mpeg); if (ret) return ret; nv_wr32(mpeg, 0x00b32c, 0x00000000); nv_wr32(mpeg, 0x00b314, 0x00000100); nv_wr32(mpeg, 0x00b0e0, 0x0000001a); nvkm_wr32(device, 0x00b32c, 0x00000000); nvkm_wr32(device, 0x00b314, 0x00000100); nvkm_wr32(device, 0x00b0e0, 0x0000001a); nv_wr32(mpeg, 0x00b220, 0x00000044); nv_wr32(mpeg, 0x00b300, 0x00801ec1); nv_wr32(mpeg, 0x00b390, 0x00000000); nv_wr32(mpeg, 0x00b394, 0x00000000); nv_wr32(mpeg, 0x00b398, 0x00000000); nv_mask(mpeg, 0x00b32c, 0x00000001, 0x00000001); nvkm_wr32(device, 0x00b220, 0x00000044); nvkm_wr32(device, 0x00b300, 0x00801ec1); nvkm_wr32(device, 0x00b390, 0x00000000); nvkm_wr32(device, 0x00b394, 0x00000000); nvkm_wr32(device, 0x00b398, 0x00000000); nvkm_mask(device, 0x00b32c, 0x00000001, 0x00000001); nv_wr32(mpeg, 0x00b100, 0xffffffff); nv_wr32(mpeg, 0x00b140, 0xffffffff); nvkm_wr32(device, 0x00b100, 0xffffffff); nvkm_wr32(device, 0x00b140, 0xffffffff); if (!nv_wait(mpeg, 0x00b200, 0x00000001, 0x00000000)) { nv_error(mpeg, "timeout 0x%08x\n", nv_rd32(mpeg, 0x00b200)); nv_error(mpeg, "timeout 0x%08x\n", nvkm_rd32(device, 0x00b200)); return -EBUSY; } Loading