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Commit 635b3c9d authored by Linus Torvalds's avatar Linus Torvalds
Browse files
* 'drm-intel-next' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel: (23 commits)
  drm/i915: remove full registers dump debug
  drm/i915: Add DP dpll limit on ironlake and use existing DPLL search function
  drm/i915: Select the correct BPC for LVDS on Ironlake
  drm/i915: Make the BPC in FDI rx/transcoder be consistent with that in pipeconf on Ironlake
  drm/i915: Enable/disable the dithering for LVDS based on VBT setting
  drm/i915: Permit pinning whilst the device is 'suspended'
  drm/i915: Hold struct mutex whilst pinning power context bo.
  drm/i915: fix unused var
  drm/i915: Storage class should be before const qualifier
  drm/i915: remove render reclock support
  drm/i915: Fix RC6 suspend/resume
  drm/i915: execbuf2 support
  drm/i915: Reload hangcheck timer too for Ironlake
  drm/i915: only enable hotplug for detected outputs
  drm/i915: Track whether cursor needs physical address in intel_device_info
  drm/i915: Implement IS_* macros using static tables
  drm/i915: Move PCI IDs into i915 driver
  drm/i915: Update LVDS connector status when receiving ACPI LID event
  drm/i915: Add MALATA PC-81005 to ACPI LID quirk list
  drm/i915: implement new pm ops for i915
  ...
parents 7959722b 823f68fd
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+1 −30
Original line number Diff line number Diff line
@@ -272,7 +272,7 @@ static void i915_dump_pages(struct seq_file *m, struct page **pages, int page_co
		mem = kmap_atomic(pages[page], KM_USER0);
		for (i = 0; i < PAGE_SIZE; i += 4)
			seq_printf(m, "%08x :  %08x\n", i, mem[i / 4]);
		kunmap_atomic(pages[page], KM_USER0);
		kunmap_atomic(mem, KM_USER0);
	}
}

@@ -386,34 +386,6 @@ static int i915_error_state(struct seq_file *m, void *unused)
	return 0;
}

static int i915_registers_info(struct seq_file *m, void *data) {
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	drm_i915_private_t *dev_priv = dev->dev_private;
	uint32_t reg;

#define DUMP_RANGE(start, end) \
	for (reg=start; reg < end; reg += 4) \
	seq_printf(m, "%08x\t%08x\n", reg, I915_READ(reg));

	DUMP_RANGE(0x00000, 0x00fff);   /* VGA registers */
	DUMP_RANGE(0x02000, 0x02fff);   /* instruction, memory, interrupt control registers */
	DUMP_RANGE(0x03000, 0x031ff);   /* FENCE and PPGTT control registers */
	DUMP_RANGE(0x03200, 0x03fff);   /* frame buffer compression registers */
	DUMP_RANGE(0x05000, 0x05fff);   /* I/O control registers */
	DUMP_RANGE(0x06000, 0x06fff);   /* clock control registers */
	DUMP_RANGE(0x07000, 0x07fff);   /* 3D internal debug registers */
	DUMP_RANGE(0x07400, 0x088ff);   /* GPE debug registers */
	DUMP_RANGE(0x0a000, 0x0afff);   /* display palette registers */
	DUMP_RANGE(0x10000, 0x13fff);   /* MMIO MCHBAR */
	DUMP_RANGE(0x30000, 0x3ffff);   /* overlay registers */
	DUMP_RANGE(0x60000, 0x6ffff);   /* display engine pipeline registers */
	DUMP_RANGE(0x70000, 0x72fff);   /* display and cursor registers */
	DUMP_RANGE(0x73000, 0x73fff);   /* performance counters */

	return 0;
}

static int
i915_wedged_open(struct inode *inode,
		 struct file *filp)
@@ -519,7 +491,6 @@ static int i915_wedged_create(struct dentry *root, struct drm_minor *minor)
}

static struct drm_info_list i915_debugfs_list[] = {
	{"i915_regs", i915_registers_info, 0},
	{"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
	{"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST},
	{"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
+13 −13
Original line number Diff line number Diff line
@@ -813,6 +813,10 @@ static int i915_getparam(struct drm_device *dev, void *data,
	case I915_PARAM_HAS_PAGEFLIPPING:
		value = 1;
		break;
	case I915_PARAM_HAS_EXECBUF2:
		/* depends on GEM */
		value = dev_priv->has_gem;
		break;
	default:
		DRM_DEBUG_DRIVER("Unknown parameter %d\n",
				 param->param);
@@ -1117,7 +1121,8 @@ static void i915_setup_compression(struct drm_device *dev, int size)
{
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct drm_mm_node *compressed_fb, *compressed_llb;
	unsigned long cfb_base, ll_base;
	unsigned long cfb_base;
	unsigned long ll_base = 0;

	/* Leave 1M for line length buffer & misc. */
	compressed_fb = drm_mm_search_free(&dev_priv->vram, size, 4096, 0);
@@ -1200,14 +1205,6 @@ static int i915_load_modeset_init(struct drm_device *dev,
	dev->mode_config.fb_base = drm_get_resource_start(dev, fb_bar) &
		0xff000000;

	if (IS_MOBILE(dev) || IS_I9XX(dev))
		dev_priv->cursor_needs_physical = true;
	else
		dev_priv->cursor_needs_physical = false;

	if (IS_I965G(dev) || IS_G33(dev))
		dev_priv->cursor_needs_physical = false;

	/* Basic memrange allocator for stolen space (aka vram) */
	drm_mm_init(&dev_priv->vram, 0, prealloc_size);
	DRM_INFO("set up %ldM of stolen space\n", prealloc_size / (1024*1024));
@@ -1257,6 +1254,8 @@ static int i915_load_modeset_init(struct drm_device *dev,
	if (ret)
		goto destroy_ringbuffer;

	intel_modeset_init(dev);

	ret = drm_irq_install(dev);
	if (ret)
		goto destroy_ringbuffer;
@@ -1271,8 +1270,6 @@ static int i915_load_modeset_init(struct drm_device *dev,

	I915_WRITE(INSTPM, (1 << 5) | (1 << 21));

	intel_modeset_init(dev);

	drm_helper_initial_config(dev);

	return 0;
@@ -1360,7 +1357,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
{
	struct drm_i915_private *dev_priv = dev->dev_private;
	resource_size_t base, size;
	int ret = 0, mmio_bar = IS_I9XX(dev) ? 0 : 1;
	int ret = 0, mmio_bar;
	uint32_t agp_size, prealloc_size, prealloc_start;

	/* i915 has 4 more counters */
@@ -1376,8 +1373,10 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)

	dev->dev_private = (void *)dev_priv;
	dev_priv->dev = dev;
	dev_priv->info = (struct intel_device_info *) flags;

	/* Add register map (needed for suspend/resume) */
	mmio_bar = IS_I9XX(dev) ? 0 : 1;
	base = drm_get_resource_start(dev, mmio_bar);
	size = drm_get_resource_len(dev, mmio_bar);

@@ -1652,6 +1651,7 @@ struct drm_ioctl_desc i915_ioctls[] = {
	DRM_IOCTL_DEF(DRM_I915_HWS_ADDR, i915_set_status_page, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
	DRM_IOCTL_DEF(DRM_I915_GEM_INIT, i915_gem_init_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
	DRM_IOCTL_DEF(DRM_I915_GEM_EXECBUFFER, i915_gem_execbuffer, DRM_AUTH),
	DRM_IOCTL_DEF(DRM_I915_GEM_EXECBUFFER2, i915_gem_execbuffer2, DRM_AUTH),
	DRM_IOCTL_DEF(DRM_I915_GEM_PIN, i915_gem_pin_ioctl, DRM_AUTH|DRM_ROOT_ONLY),
	DRM_IOCTL_DEF(DRM_I915_GEM_UNPIN, i915_gem_unpin_ioctl, DRM_AUTH|DRM_ROOT_ONLY),
	DRM_IOCTL_DEF(DRM_I915_GEM_BUSY, i915_gem_busy_ioctl, DRM_AUTH),
+165 −9
Original line number Diff line number Diff line
@@ -33,7 +33,6 @@
#include "i915_drm.h"
#include "i915_drv.h"

#include "drm_pciids.h"
#include <linux/console.h>
#include "drm_crtc_helper.h"

@@ -48,8 +47,124 @@ module_param_named(powersave, i915_powersave, int, 0400);

static struct drm_driver driver;

static struct pci_device_id pciidlist[] = {
	i915_PCI_IDS
#define INTEL_VGA_DEVICE(id, info) {		\
	.class = PCI_CLASS_DISPLAY_VGA << 8,	\
	.class_mask = 0xffff00,			\
	.vendor = 0x8086,			\
	.device = id,				\
	.subvendor = PCI_ANY_ID,		\
	.subdevice = PCI_ANY_ID,		\
	.driver_data = (unsigned long) info }

const static struct intel_device_info intel_i830_info = {
	.is_i8xx = 1, .is_mobile = 1, .cursor_needs_physical = 1,
};

const static struct intel_device_info intel_845g_info = {
	.is_i8xx = 1,
};

const static struct intel_device_info intel_i85x_info = {
	.is_i8xx = 1, .is_mobile = 1, .cursor_needs_physical = 1,
};

const static struct intel_device_info intel_i865g_info = {
	.is_i8xx = 1,
};

const static struct intel_device_info intel_i915g_info = {
	.is_i915g = 1, .is_i9xx = 1, .cursor_needs_physical = 1,
};
const static struct intel_device_info intel_i915gm_info = {
	.is_i9xx = 1,  .is_mobile = 1, .has_fbc = 1,
	.cursor_needs_physical = 1,
};
const static struct intel_device_info intel_i945g_info = {
	.is_i9xx = 1, .has_hotplug = 1, .cursor_needs_physical = 1,
};
const static struct intel_device_info intel_i945gm_info = {
	.is_i945gm = 1, .is_i9xx = 1, .is_mobile = 1, .has_fbc = 1,
	.has_hotplug = 1, .cursor_needs_physical = 1,
};

const static struct intel_device_info intel_i965g_info = {
	.is_i965g = 1, .is_i9xx = 1, .has_hotplug = 1,
};

const static struct intel_device_info intel_i965gm_info = {
	.is_i965g = 1, .is_mobile = 1, .is_i965gm = 1, .is_i9xx = 1,
	.is_mobile = 1, .has_fbc = 1, .has_rc6 = 1,
	.has_hotplug = 1,
};

const static struct intel_device_info intel_g33_info = {
	.is_g33 = 1, .is_i9xx = 1, .need_gfx_hws = 1,
	.has_hotplug = 1,
};

const static struct intel_device_info intel_g45_info = {
	.is_i965g = 1, .is_g4x = 1, .is_i9xx = 1, .need_gfx_hws = 1,
	.has_pipe_cxsr = 1,
	.has_hotplug = 1,
};

const static struct intel_device_info intel_gm45_info = {
	.is_i965g = 1, .is_mobile = 1, .is_g4x = 1, .is_i9xx = 1,
	.is_mobile = 1, .need_gfx_hws = 1, .has_fbc = 1, .has_rc6 = 1,
	.has_pipe_cxsr = 1,
	.has_hotplug = 1,
};

const static struct intel_device_info intel_pineview_info = {
	.is_g33 = 1, .is_pineview = 1, .is_mobile = 1, .is_i9xx = 1,
	.has_pipe_cxsr = 1,
	.has_hotplug = 1,
};

const static struct intel_device_info intel_ironlake_d_info = {
	.is_ironlake = 1, .is_i965g = 1, .is_i9xx = 1, .need_gfx_hws = 1,
	.has_pipe_cxsr = 1,
	.has_hotplug = 1,
};

const static struct intel_device_info intel_ironlake_m_info = {
	.is_ironlake = 1, .is_mobile = 1, .is_i965g = 1, .is_i9xx = 1,
	.need_gfx_hws = 1, .has_rc6 = 1,
	.has_hotplug = 1,
};

const static struct pci_device_id pciidlist[] = {
	INTEL_VGA_DEVICE(0x3577, &intel_i830_info),
	INTEL_VGA_DEVICE(0x2562, &intel_845g_info),
	INTEL_VGA_DEVICE(0x3582, &intel_i85x_info),
	INTEL_VGA_DEVICE(0x35e8, &intel_i85x_info),
	INTEL_VGA_DEVICE(0x2572, &intel_i865g_info),
	INTEL_VGA_DEVICE(0x2582, &intel_i915g_info),
	INTEL_VGA_DEVICE(0x258a, &intel_i915g_info),
	INTEL_VGA_DEVICE(0x2592, &intel_i915gm_info),
	INTEL_VGA_DEVICE(0x2772, &intel_i945g_info),
	INTEL_VGA_DEVICE(0x27a2, &intel_i945gm_info),
	INTEL_VGA_DEVICE(0x27ae, &intel_i945gm_info),
	INTEL_VGA_DEVICE(0x2972, &intel_i965g_info),
	INTEL_VGA_DEVICE(0x2982, &intel_i965g_info),
	INTEL_VGA_DEVICE(0x2992, &intel_i965g_info),
	INTEL_VGA_DEVICE(0x29a2, &intel_i965g_info),
	INTEL_VGA_DEVICE(0x29b2, &intel_g33_info),
	INTEL_VGA_DEVICE(0x29c2, &intel_g33_info),
	INTEL_VGA_DEVICE(0x29d2, &intel_g33_info),
	INTEL_VGA_DEVICE(0x2a02, &intel_i965gm_info),
	INTEL_VGA_DEVICE(0x2a12, &intel_i965gm_info),
	INTEL_VGA_DEVICE(0x2a42, &intel_gm45_info),
	INTEL_VGA_DEVICE(0x2e02, &intel_g45_info),
	INTEL_VGA_DEVICE(0x2e12, &intel_g45_info),
	INTEL_VGA_DEVICE(0x2e22, &intel_g45_info),
	INTEL_VGA_DEVICE(0x2e32, &intel_g45_info),
	INTEL_VGA_DEVICE(0x2e42, &intel_g45_info),
	INTEL_VGA_DEVICE(0xa001, &intel_pineview_info),
	INTEL_VGA_DEVICE(0xa011, &intel_pineview_info),
	INTEL_VGA_DEVICE(0x0042, &intel_ironlake_d_info),
	INTEL_VGA_DEVICE(0x0046, &intel_ironlake_m_info),
	{0, 0, 0}
};

#if defined(CONFIG_DRM_I915_KMS)
@@ -284,6 +399,52 @@ i915_pci_resume(struct pci_dev *pdev)
	return i915_resume(dev);
}

static int
i915_pm_suspend(struct device *dev)
{
	return i915_pci_suspend(to_pci_dev(dev), PMSG_SUSPEND);
}

static int
i915_pm_resume(struct device *dev)
{
	return i915_pci_resume(to_pci_dev(dev));
}

static int
i915_pm_freeze(struct device *dev)
{
	return i915_pci_suspend(to_pci_dev(dev), PMSG_FREEZE);
}

static int
i915_pm_thaw(struct device *dev)
{
	/* thaw during hibernate, do nothing! */
	return 0;
}

static int
i915_pm_poweroff(struct device *dev)
{
	return i915_pci_suspend(to_pci_dev(dev), PMSG_HIBERNATE);
}

static int
i915_pm_restore(struct device *dev)
{
	return i915_pci_resume(to_pci_dev(dev));
}

const struct dev_pm_ops i915_pm_ops = {
     .suspend = i915_pm_suspend,
     .resume = i915_pm_resume,
     .freeze = i915_pm_freeze,
     .thaw = i915_pm_thaw,
     .poweroff = i915_pm_poweroff,
     .restore = i915_pm_restore,
};

static struct vm_operations_struct i915_gem_vm_ops = {
	.fault = i915_gem_fault,
	.open = drm_gem_vm_open,
@@ -303,8 +464,6 @@ static struct drm_driver driver = {
	.lastclose = i915_driver_lastclose,
	.preclose = i915_driver_preclose,
	.postclose = i915_driver_postclose,
	.suspend = i915_suspend,
	.resume = i915_resume,
	.device_is_agp = i915_driver_device_is_agp,
	.enable_vblank = i915_enable_vblank,
	.disable_vblank = i915_disable_vblank,
@@ -344,10 +503,7 @@ static struct drm_driver driver = {
		 .id_table = pciidlist,
		 .probe = i915_pci_probe,
		 .remove = i915_pci_remove,
#ifdef CONFIG_PM
		 .resume = i915_pci_resume,
		 .suspend = i915_pci_suspend,
#endif
		 .driver.pm = &i915_pm_ops,
	},

	.name = DRIVER_NAME,
+55 −68
Original line number Diff line number Diff line
@@ -172,9 +172,31 @@ struct drm_i915_display_funcs {

struct intel_overlay;

struct intel_device_info {
	u8 is_mobile : 1;
	u8 is_i8xx : 1;
	u8 is_i915g : 1;
	u8 is_i9xx : 1;
	u8 is_i945gm : 1;
	u8 is_i965g : 1;
	u8 is_i965gm : 1;
	u8 is_g33 : 1;
	u8 need_gfx_hws : 1;
	u8 is_g4x : 1;
	u8 is_pineview : 1;
	u8 is_ironlake : 1;
	u8 has_fbc : 1;
	u8 has_rc6 : 1;
	u8 has_pipe_cxsr : 1;
	u8 has_hotplug : 1;
	u8 cursor_needs_physical : 1;
};

typedef struct drm_i915_private {
	struct drm_device *dev;

	const struct intel_device_info *info;

	int has_gem;

	void __iomem *regs;
@@ -232,8 +254,6 @@ typedef struct drm_i915_private {
	int hangcheck_count;
	uint32_t last_acthd;

	bool cursor_needs_physical;

	struct drm_mm vram;

	unsigned long cfb_size;
@@ -287,8 +307,6 @@ typedef struct drm_i915_private {
	u32 saveDSPACNTR;
	u32 saveDSPBCNTR;
	u32 saveDSPARB;
	u32 saveRENDERSTANDBY;
	u32 savePWRCTXA;
	u32 saveHWS;
	u32 savePIPEACONF;
	u32 savePIPEBCONF;
@@ -561,6 +579,7 @@ typedef struct drm_i915_private {
	u16 orig_clock;
	int child_dev_num;
	struct child_device_config *child_dev;
	struct drm_connector *int_lvds_connector;
} drm_i915_private_t;

/** driver private structure attached to each drm_gem_object */
@@ -794,6 +813,8 @@ int i915_gem_sw_finish_ioctl(struct drm_device *dev, void *data,
			     struct drm_file *file_priv);
int i915_gem_execbuffer(struct drm_device *dev, void *data,
			struct drm_file *file_priv);
int i915_gem_execbuffer2(struct drm_device *dev, void *data,
			 struct drm_file *file_priv);
int i915_gem_pin_ioctl(struct drm_device *dev, void *data,
		       struct drm_file *file_priv);
int i915_gem_unpin_ioctl(struct drm_device *dev, void *data,
@@ -860,6 +881,9 @@ void i915_gem_shrinker_exit(void);
void i915_gem_detect_bit_6_swizzle(struct drm_device *dev);
void i915_gem_object_do_bit_17_swizzle(struct drm_gem_object *obj);
void i915_gem_object_save_bit_17_swizzle(struct drm_gem_object *obj);
bool i915_tiling_ok(struct drm_device *dev, int stride, int size,
		    int tiling_mode);
bool i915_obj_fenceable(struct drm_device *dev, struct drm_gem_object *obj);

/* i915_gem_debug.c */
void i915_gem_dump_object(struct drm_gem_object *obj, int len,
@@ -982,67 +1006,33 @@ extern void g4x_disable_fbc(struct drm_device *dev);
extern int i915_wrap_ring(struct drm_device * dev);
extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);

#define INTEL_INFO(dev)	(((struct drm_i915_private *) (dev)->dev_private)->info)

#define IS_I830(dev)		((dev)->pci_device == 0x3577)
#define IS_845G(dev)		((dev)->pci_device == 0x2562)
#define IS_I85X(dev)		((dev)->pci_device == 0x3582)
#define IS_I865G(dev)		((dev)->pci_device == 0x2572)
#define IS_I8XX(dev) (IS_I830(dev) || IS_845G(dev) || IS_I85X(dev) || IS_I865G(dev))

#define IS_I915G(dev) ((dev)->pci_device == 0x2582 || (dev)->pci_device == 0x258a)
#define IS_I8XX(dev)		(INTEL_INFO(dev)->is_i8xx)
#define IS_I915G(dev)		(INTEL_INFO(dev)->is_i915g)
#define IS_I915GM(dev)		((dev)->pci_device == 0x2592)
#define IS_I945G(dev)		((dev)->pci_device == 0x2772)
#define IS_I945GM(dev) ((dev)->pci_device == 0x27A2 ||\
		        (dev)->pci_device == 0x27AE)
#define IS_I965G(dev) ((dev)->pci_device == 0x2972 || \
		       (dev)->pci_device == 0x2982 || \
		       (dev)->pci_device == 0x2992 || \
		       (dev)->pci_device == 0x29A2 || \
		       (dev)->pci_device == 0x2A02 || \
		       (dev)->pci_device == 0x2A12 || \
		       (dev)->pci_device == 0x2A42 || \
		       (dev)->pci_device == 0x2E02 || \
		       (dev)->pci_device == 0x2E12 || \
		       (dev)->pci_device == 0x2E22 || \
		       (dev)->pci_device == 0x2E32 || \
		       (dev)->pci_device == 0x2E42 || \
		       (dev)->pci_device == 0x0042 || \
		       (dev)->pci_device == 0x0046)

#define IS_I965GM(dev) ((dev)->pci_device == 0x2A02 || \
			(dev)->pci_device == 0x2A12)

#define IS_I945GM(dev)		(INTEL_INFO(dev)->is_i945gm)
#define IS_I965G(dev)		(INTEL_INFO(dev)->is_i965g)
#define IS_I965GM(dev)		(INTEL_INFO(dev)->is_i965gm)
#define IS_GM45(dev)		((dev)->pci_device == 0x2A42)

#define IS_G4X(dev) ((dev)->pci_device == 0x2E02 || \
		     (dev)->pci_device == 0x2E12 || \
		     (dev)->pci_device == 0x2E22 || \
		     (dev)->pci_device == 0x2E32 || \
		     (dev)->pci_device == 0x2E42 || \
		     IS_GM45(dev))

#define IS_G4X(dev)		(INTEL_INFO(dev)->is_g4x)
#define IS_PINEVIEW_G(dev)	((dev)->pci_device == 0xa001)
#define IS_PINEVIEW_M(dev)	((dev)->pci_device == 0xa011)
#define IS_PINEVIEW(dev) (IS_PINEVIEW_G(dev) || IS_PINEVIEW_M(dev))

#define IS_G33(dev)    ((dev)->pci_device == 0x29C2 ||	\
			(dev)->pci_device == 0x29B2 ||	\
			(dev)->pci_device == 0x29D2 ||  \
			(IS_PINEVIEW(dev)))

#define IS_PINEVIEW(dev)	(INTEL_INFO(dev)->is_pineview)
#define IS_G33(dev)		(INTEL_INFO(dev)->is_g33)
#define IS_IRONLAKE_D(dev)	((dev)->pci_device == 0x0042)
#define IS_IRONLAKE_M(dev)	((dev)->pci_device == 0x0046)
#define IS_IRONLAKE(dev)	(IS_IRONLAKE_D(dev) || IS_IRONLAKE_M(dev))

#define IS_I9XX(dev) (IS_I915G(dev) || IS_I915GM(dev) || IS_I945G(dev) || \
		      IS_I945GM(dev) || IS_I965G(dev) || IS_G33(dev) || \
		      IS_IRONLAKE(dev))
#define IS_IRONLAKE(dev)	(INTEL_INFO(dev)->is_ironlake)
#define IS_I9XX(dev)		(INTEL_INFO(dev)->is_i9xx)
#define IS_MOBILE(dev)		(INTEL_INFO(dev)->is_mobile)

#define IS_MOBILE(dev) (IS_I830(dev) || IS_I85X(dev) || IS_I915GM(dev) || \
			IS_I945GM(dev) || IS_I965GM(dev) || IS_GM45(dev) || \
			IS_PINEVIEW(dev) || IS_IRONLAKE_M(dev))
#define I915_NEED_GFX_HWS(dev)	(INTEL_INFO(dev)->need_gfx_hws)

#define I915_NEED_GFX_HWS(dev) (IS_G33(dev) || IS_GM45(dev) || IS_G4X(dev) || \
				IS_IRONLAKE(dev))
/* With the 945 and later, Y tiling got adjusted so that it was 32 128-byte
 * rows, which changed the alignment requirements and fence programming.
 */
@@ -1054,17 +1044,14 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
#define SUPPORTS_EDP(dev)		(IS_IRONLAKE_M(dev))
#define SUPPORTS_TV(dev)		(IS_I9XX(dev) && IS_MOBILE(dev) && \
					!IS_IRONLAKE(dev) && !IS_PINEVIEW(dev))
#define I915_HAS_HOTPLUG(dev) (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev) || IS_I965G(dev))
#define I915_HAS_HOTPLUG(dev)		 (INTEL_INFO(dev)->has_hotplug)
/* dsparb controlled by hw only */
#define DSPARB_HWCONTROL(dev) (IS_G4X(dev) || IS_IRONLAKE(dev))

#define HAS_FW_BLC(dev) (IS_I9XX(dev) || IS_G4X(dev) || IS_IRONLAKE(dev))
#define HAS_PIPE_CXSR(dev) (IS_G4X(dev) || IS_IRONLAKE(dev))
#define I915_HAS_FBC(dev) (IS_MOBILE(dev) && \
			   (IS_I9XX(dev) || IS_GM45(dev)) && \
			   !IS_PINEVIEW(dev) && \
			   !IS_IRONLAKE(dev))
#define I915_HAS_RC6(dev) (IS_I965GM(dev) || IS_GM45(dev) || IS_IRONLAKE_M(dev))
#define HAS_PIPE_CXSR(dev) (INTEL_INFO(dev)->has_pipe_cxsr)
#define I915_HAS_FBC(dev) (INTEL_INFO(dev)->has_fbc)
#define I915_HAS_RC6(dev) (INTEL_INFO(dev)->has_rc6)

#define PRIMARY_RINGBUFFER_SIZE         (128*1024)

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