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Commit 62cedc4f authored by Florian Fainelli's avatar Florian Fainelli Committed by John Crispin
Browse files

MIPS: introduce CPU_R4K_CACHE_TLB 



R4K-style CPUs having common code to support their caches and tlb have this
boolean defined by default. Allows us to remove some lines in
arch/mips/mm/Makefile.

Signed-off-by: default avatarFlorian Fainelli <florian@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/3328/


Signed-off-by: default avatarJohn Crispin <blogic@openwrt.org>
parent 91405eb6

arch/mips/Kconfig

+4 −0
Original line number Diff line number Diff line
@@ -1888,6 +1888,10 @@ config CPU_R4K_FPU 
	bool

	default y if !(CPU_R3000 || CPU_R6000 || CPU_TX39XX || CPU_CAVIUM_OCTEON)



config CPU_R4K_CACHE_TLB

	bool

	default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON)



choice

	prompt "MIPS MT options"

arch/mips/mm/Makefile

+1 −16
Original line number Diff line number Diff line
@@ -11,27 +11,12 @@ obj-$(CONFIG_64BIT) += pgtable-64.o 
obj-$(CONFIG_HIGHMEM)		+= highmem.o

obj-$(CONFIG_HUGETLB_PAGE)	+= hugetlbpage.o



obj-$(CONFIG_CPU_LOONGSON2)	+= c-r4k.o cex-gen.o tlb-r4k.o

obj-$(CONFIG_CPU_MIPS32)	+= c-r4k.o cex-gen.o tlb-r4k.o

obj-$(CONFIG_CPU_MIPS64)	+= c-r4k.o cex-gen.o tlb-r4k.o

obj-$(CONFIG_CPU_NEVADA)	+= c-r4k.o cex-gen.o tlb-r4k.o

obj-$(CONFIG_CPU_R10000)	+= c-r4k.o cex-gen.o tlb-r4k.o

obj-$(CONFIG_CPU_R4K_CACHE_TLB) += c-r4k.o cex-gen.o tlb-r4k.o

obj-$(CONFIG_CPU_R3000)		+= c-r3k.o tlb-r3k.o

obj-$(CONFIG_CPU_R4300)		+= c-r4k.o cex-gen.o tlb-r4k.o

obj-$(CONFIG_CPU_R4X00)		+= c-r4k.o cex-gen.o tlb-r4k.o

obj-$(CONFIG_CPU_R5000)		+= c-r4k.o cex-gen.o tlb-r4k.o

obj-$(CONFIG_CPU_R5432)		+= c-r4k.o cex-gen.o tlb-r4k.o

obj-$(CONFIG_CPU_R5500)		+= c-r4k.o cex-gen.o tlb-r4k.o

obj-$(CONFIG_CPU_R8000)		+= c-r4k.o cex-gen.o tlb-r8k.o

obj-$(CONFIG_CPU_RM7000)	+= c-r4k.o cex-gen.o tlb-r4k.o

obj-$(CONFIG_CPU_RM9000)	+= c-r4k.o cex-gen.o tlb-r4k.o

obj-$(CONFIG_CPU_SB1)		+= c-r4k.o cerr-sb1.o cex-sb1.o tlb-r4k.o

obj-$(CONFIG_CPU_TX39XX)	+= c-tx39.o tlb-r3k.o

obj-$(CONFIG_CPU_TX49XX)	+= c-r4k.o cex-gen.o tlb-r4k.o

obj-$(CONFIG_CPU_VR41XX)	+= c-r4k.o cex-gen.o tlb-r4k.o

obj-$(CONFIG_CPU_CAVIUM_OCTEON)	+= c-octeon.o cex-oct.o tlb-r4k.o

obj-$(CONFIG_CPU_XLR)		+= c-r4k.o tlb-r4k.o cex-gen.o

obj-$(CONFIG_CPU_XLP)		+= c-r4k.o tlb-r4k.o cex-gen.o



obj-$(CONFIG_IP22_CPU_SCACHE)	+= sc-ip22.o

obj-$(CONFIG_R5000_CPU_SCACHE)  += sc-r5k.o