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Commit 629b557a authored by Masahiro Yamada's avatar Masahiro Yamada Committed by Arnd Bergmann
Browse files

ARM: dts: uniphier: factor out common nodes to uniphier-common32.dtsi 



UniPhier SoCs (except PH1-sLD3) have several nodes in common.
Factor out them into uniphier-common32.dtsi.  This improves the code
maintainability.

PH1-sLD3 is so old that it has more or less different register maps
than the others.  So, it cannot be included in this refactoring.

Signed-off-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parent 618a43ea

arch/arm/boot/dts/uniphier-common32.dtsi

0 → 100644
+135 −0
Original line number Diff line number Diff line 
/*

 * Device Tree Source commonly used by UniPhier ARM SoCs

 *

 * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>

 *

 * This file is dual-licensed: you can use it either under the terms

 * of the GPL or the X11 license, at your option. Note that this dual

 * licensing only applies to this file, and not this project as a

 * whole.

 *

 *  a) This file is free software; you can redistribute it and/or

 *     modify it under the terms of the GNU General Public License as

 *     published by the Free Software Foundation; either version 2 of the

 *     License, or (at your option) any later version.

 *

 *     This file is distributed in the hope that it will be useful,

 *     but WITHOUT ANY WARRANTY; without even the implied warranty of

 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 *     GNU General Public License for more details.

 *

 * Or, alternatively,

 *

 *  b) Permission is hereby granted, free of charge, to any person

 *     obtaining a copy of this software and associated documentation

 *     files (the "Software"), to deal in the Software without

 *     restriction, including without limitation the rights to use,

 *     copy, modify, merge, publish, distribute, sublicense, and/or

 *     sell copies of the Software, and to permit persons to whom the

 *     Software is furnished to do so, subject to the following

 *     conditions:

 *

 *     The above copyright notice and this permission notice shall be

 *     included in all copies or substantial portions of the Software.

 *

 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,

 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES

 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND

 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT

 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,

 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING

 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR

 *     OTHER DEALINGS IN THE SOFTWARE.

 */



/include/ "skeleton.dtsi"



/ {

	soc: soc {

		compatible = "simple-bus";

		#address-cells = <1>;

		#size-cells = <1>;

		ranges;

		interrupt-parent = <&intc>;



		extbus: extbus {

			compatible = "simple-bus";

			#address-cells = <2>;

			#size-cells = <1>;

		};



		serial0: serial@54006800 {

			compatible = "socionext,uniphier-uart";

			status = "disabled";

			reg = <0x54006800 0x40>;

			interrupts = <0 33 4>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_uart0>;

			clocks = <&uart_clk>;

		};



		serial1: serial@54006900 {

			compatible = "socionext,uniphier-uart";

			status = "disabled";

			reg = <0x54006900 0x40>;

			interrupts = <0 35 4>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_uart1>;

			clocks = <&uart_clk>;

		};



		serial2: serial@54006a00 {

			compatible = "socionext,uniphier-uart";

			status = "disabled";

			reg = <0x54006a00 0x40>;

			interrupts = <0 37 4>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_uart2>;

			clocks = <&uart_clk>;

		};



		serial3: serial@54006b00 {

			compatible = "socionext,uniphier-uart";

			status = "disabled";

			reg = <0x54006b00 0x40>;

			interrupts = <0 177 4>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_uart3>;

			clocks = <&uart_clk>;

		};



		system-bus-controller@58c00000 {

			compatible = "socionext,uniphier-system-bus-controller";

			reg = <0x58c00000 0x400>, <0x59800000 0x2000>;

		};



		timer@60000200 {

			compatible = "arm,cortex-a9-global-timer";

			reg = <0x60000200 0x20>;

			interrupts = <1 11 0x104>;

			clocks = <&arm_timer_clk>;

		};



		timer@60000600 {

			compatible = "arm,cortex-a9-twd-timer";

			reg = <0x60000600 0x20>;

			interrupts = <1 13 0x104>;

			clocks = <&arm_timer_clk>;

		};



		intc: interrupt-controller@60001000 {

			compatible = "arm,cortex-a9-gic";

			reg = <0x60001000 0x1000>,

			      <0x60000100 0x100>;

			#interrupt-cells = <3>;

			interrupt-controller;

		};



		pinctrl: pinctrl@5f801000 {

			/* specify compatible in each SoC DTSI */

			reg = <0x5f801000 0xe00>;

		};

	};

};



/include/ "uniphier-pinctrl.dtsi"

arch/arm/boot/dts/uniphier-ph1-ld4.dtsi

+91 −174
Original line number Diff line number Diff line
@@ -42,7 +42,7 @@ 
 *     OTHER DEALINGS IN THE SOFTWARE.

 */



/include/ "skeleton.dtsi"

/include/ "uniphier-common32.dtsi"



/ {

	compatible = "socionext,ph1-ld4";
@@ -78,24 +78,12 @@ 
			clock-frequency = <100000000>;

		};

	};



	soc {

		compatible = "simple-bus";

		#address-cells = <1>;

		#size-cells = <1>;

		ranges;

		interrupt-parent = <&intc>;



		extbus: extbus {

			compatible = "simple-bus";

			#address-cells = <2>;

			#size-cells = <1>;

};



&soc {

	l2: l2-cache@500c0000 {

		compatible = "socionext,uniphier-system-cache";

			reg = <0x500c0000 0x2000>, <0x503c0100 0x4>,

			      <0x506c0000 0x400>;

		reg = <0x500c0000 0x2000>, <0x503c0100 0x4>, <0x506c0000 0x400>;

		interrupts = <0 174 4>, <0 175 4>;

		cache-unified;

		cache-size = <(512 * 1024)>;
@@ -104,59 +92,15 @@ 
		cache-level = <2>;

	};



		serial0: serial@54006800 {

			compatible = "socionext,uniphier-uart";

			status = "disabled";

			reg = <0x54006800 0x40>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_uart0>;

			interrupts = <0 33 4>;

			clocks = <&uart_clk>;

			fifo-size = <64>;

		};



		serial1: serial@54006900 {

			compatible = "socionext,uniphier-uart";

			status = "disabled";

			reg = <0x54006900 0x40>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_uart1>;

			interrupts = <0 35 4>;

			clocks = <&uart_clk>;

			fifo-size = <64>;

		};



		serial2: serial@54006a00 {

			compatible = "socionext,uniphier-uart";

			status = "disabled";

			reg = <0x54006a00 0x40>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_uart2>;

			interrupts = <0 37 4>;

			clocks = <&uart_clk>;

			fifo-size = <64>;

		};



		serial3: serial@54006b00 {

			compatible = "socionext,uniphier-uart";

			status = "disabled";

			reg = <0x54006b00 0x40>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_uart3>;

			interrupts = <0 29 4>;

			clocks = <&uart_clk>;

			fifo-size = <64>;

		};



	i2c0: i2c@58400000 {

		compatible = "socionext,uniphier-i2c";

		status = "disabled";

		reg = <0x58400000 0x40>;

		#address-cells = <1>;

		#size-cells = <0>;

		interrupts = <0 41 1>;

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_i2c0>;

			interrupts = <0 41 1>;

		clocks = <&iobus_clk>;

		clock-frequency = <100000>;

	};
@@ -167,9 +111,9 @@ 
		reg = <0x58480000 0x40>;

		#address-cells = <1>;

		#size-cells = <0>;

		interrupts = <0 42 1>;

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_i2c1>;

			interrupts = <0 42 1>;

		clocks = <&iobus_clk>;

		clock-frequency = <100000>;

	};
@@ -180,9 +124,9 @@ 
		reg = <0x58500000 0x40>;

		#address-cells = <1>;

		#size-cells = <0>;

		interrupts = <0 43 1>;

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_i2c2>;

			interrupts = <0 43 1>;

		clocks = <&iobus_clk>;

		clock-frequency = <400000>;

	};
@@ -193,73 +137,46 @@ 
		reg = <0x58580000 0x40>;

		#address-cells = <1>;

		#size-cells = <0>;

		interrupts = <0 44 1>;

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_i2c3>;

			interrupts = <0 44 1>;

		clocks = <&iobus_clk>;

		clock-frequency = <100000>;

	};



		system-bus-controller@58c00000 {

			compatible = "socionext,uniphier-system-bus-controller";

			reg = <0x58c00000 0x400>, <0x59800000 0x2000>;

		};



	usb0: usb@5a800100 {

		compatible = "socionext,uniphier-ehci", "generic-ehci";

		status = "disabled";

		reg = <0x5a800100 0x100>;

		interrupts = <0 80 4>;

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_usb0>;

			interrupts = <0 80 4>;

	};



	usb1: usb@5a810100 {

		compatible = "socionext,uniphier-ehci", "generic-ehci";

		status = "disabled";

		reg = <0x5a810100 0x100>;

		interrupts = <0 81 4>;

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_usb1>;

			interrupts = <0 81 4>;

	};



	usb2: usb@5a820100 {

		compatible = "socionext,uniphier-ehci", "generic-ehci";

		status = "disabled";

		reg = <0x5a820100 0x100>;

		interrupts = <0 82 4>;

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_usb2>;

			interrupts = <0 82 4>;

		};



		pinctrl: pinctrl@5f801000 {

			compatible = "socionext,ph1-ld4-pinctrl",

				     "syscon";

			reg = <0x5f801000 0xe00>;

	};



		timer@60000200 {

			compatible = "arm,cortex-a9-global-timer";

			reg = <0x60000200 0x20>;

			interrupts = <1 11 0x104>;

			clocks = <&arm_timer_clk>;

};



		timer@60000600 {

			compatible = "arm,cortex-a9-twd-timer";

			reg = <0x60000600 0x20>;

			interrupts = <1 13 0x104>;

			clocks = <&arm_timer_clk>;

&serial3 {

	interrupts = <0 29 4>;

};



		intc: interrupt-controller@60001000 {

			compatible = "arm,cortex-a9-gic";

			#interrupt-cells = <3>;

			interrupt-controller;

			reg = <0x60001000 0x1000>,

			      <0x60000100 0x100>;

		};

&pinctrl {

	compatible = "socionext,ph1-ld4-pinctrl", "syscon";

};
 
};



/include/ "uniphier-pinctrl.dtsi"

arch/arm/boot/dts/uniphier-ph1-pro4.dtsi

+100 −188
Original line number Diff line number Diff line
@@ -42,7 +42,7 @@ 
 *     OTHER DEALINGS IN THE SOFTWARE.

 */



/include/ "skeleton.dtsi"

/include/ "uniphier-common32.dtsi"



/ {

	compatible = "socionext,ph1-pro4";
@@ -86,24 +86,12 @@ 
			clock-frequency = <50000000>;

		};

	};



	soc {

		compatible = "simple-bus";

		#address-cells = <1>;

		#size-cells = <1>;

		ranges;

		interrupt-parent = <&intc>;



		extbus: extbus {

			compatible = "simple-bus";

			#address-cells = <2>;

			#size-cells = <1>;

};



&soc {

	l2: l2-cache@500c0000 {

		compatible = "socionext,uniphier-system-cache";

			reg = <0x500c0000 0x2000>, <0x503c0100 0x4>,

			      <0x506c0000 0x400>;

		reg = <0x500c0000 0x2000>, <0x503c0100 0x4>, <0x506c0000 0x400>;

		interrupts = <0 174 4>, <0 175 4>;

		cache-unified;

		cache-size = <(768 * 1024)>;
@@ -112,59 +100,15 @@ 
		cache-level = <2>;

	};



		serial0: serial@54006800 {

			compatible = "socionext,uniphier-uart";

			status = "disabled";

			reg = <0x54006800 0x40>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_uart0>;

			interrupts = <0 33 4>;

			clocks = <&uart_clk>;

			fifo-size = <64>;

		};



		serial1: serial@54006900 {

			compatible = "socionext,uniphier-uart";

			status = "disabled";

			reg = <0x54006900 0x40>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_uart1>;

			interrupts = <0 35 4>;

			clocks = <&uart_clk>;

			fifo-size = <64>;

		};



		serial2: serial@54006a00 {

			compatible = "socionext,uniphier-uart";

			status = "disabled";

			reg = <0x54006a00 0x40>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_uart2>;

			interrupts = <0 37 4>;

			clocks = <&uart_clk>;

			fifo-size = <64>;

		};



		serial3: serial@54006b00 {

			compatible = "socionext,uniphier-uart";

			status = "disabled";

			reg = <0x54006b00 0x40>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_uart3>;

			interrupts = <0 177 4>;

			clocks = <&uart_clk>;

			fifo-size = <64>;

		};



	i2c0: i2c@58780000 {

		compatible = "socionext,uniphier-fi2c";

		status = "disabled";

		reg = <0x58780000 0x80>;

		#address-cells = <1>;

		#size-cells = <0>;

		interrupts = <0 41 4>;

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_i2c0>;

			interrupts = <0 41 4>;

		clocks = <&i2c_clk>;

		clock-frequency = <100000>;

	};
@@ -175,9 +119,9 @@ 
		reg = <0x58781000 0x80>;

		#address-cells = <1>;

		#size-cells = <0>;

		interrupts = <0 42 4>;

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_i2c1>;

			interrupts = <0 42 4>;

		clocks = <&i2c_clk>;

		clock-frequency = <100000>;

	};
@@ -188,9 +132,9 @@ 
		reg = <0x58782000 0x80>;

		#address-cells = <1>;

		#size-cells = <0>;

		interrupts = <0 43 4>;

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_i2c2>;

			interrupts = <0 43 4>;

		clocks = <&i2c_clk>;

		clock-frequency = <100000>;

	};
@@ -201,9 +145,9 @@ 
		reg = <0x58783000 0x80>;

		#address-cells = <1>;

		#size-cells = <0>;

		interrupts = <0 44 4>;

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_i2c3>;

			interrupts = <0 44 4>;

		clocks = <&i2c_clk>;

		clock-frequency = <100000>;

	};
@@ -232,57 +176,25 @@ 
		clock-frequency = <400000>;

	};



		system-bus-controller@58c00000 {

			compatible = "socionext,uniphier-system-bus-controller";

			reg = <0x58c00000 0x400>, <0x59800000 0x2000>;

		};



	usb2: usb@5a800100 {

		compatible = "socionext,uniphier-ehci", "generic-ehci";

		status = "disabled";

		reg = <0x5a800100 0x100>;

		interrupts = <0 80 4>;

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_usb2>;

			interrupts = <0 80 4>;

	};



	usb3: usb@5a810100 {

		compatible = "socionext,uniphier-ehci", "generic-ehci";

		status = "disabled";

		reg = <0x5a810100 0x100>;

		interrupts = <0 81 4>;

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_usb3>;

			interrupts = <0 81 4>;

		};



		pinctrl: pinctrl@5f801000 {

			compatible = "socionext,ph1-pro4-pinctrl",

				     "syscon";

			reg = <0x5f801000 0xe00>;

		};



		timer@60000200 {

			compatible = "arm,cortex-a9-global-timer";

			reg = <0x60000200 0x20>;

			interrupts = <1 11 0x304>;

			clocks = <&arm_timer_clk>;

	};



		timer@60000600 {

			compatible = "arm,cortex-a9-twd-timer";

			reg = <0x60000600 0x20>;

			interrupts = <1 13 0x304>;

			clocks = <&arm_timer_clk>;

};



		intc: interrupt-controller@60001000 {

			compatible = "arm,cortex-a9-gic";

			#interrupt-cells = <3>;

			interrupt-controller;

			reg = <0x60001000 0x1000>,

			      <0x60000100 0x100>;

		};

&pinctrl {

	compatible = "socionext,ph1-pro4-pinctrl", "syscon";

};
 
};



/include/ "uniphier-pinctrl.dtsi"

arch/arm/boot/dts/uniphier-ph1-pro5.dtsi

+95 −179
Original line number Diff line number Diff line
@@ -42,7 +42,7 @@ 
 *     OTHER DEALINGS IN THE SOFTWARE.

 */



/include/ "skeleton.dtsi"

/include/ "uniphier-common32.dtsi"



/ {

	compatible = "socionext,ph1-pro5";
@@ -86,24 +86,12 @@ 
			clock-frequency = <50000000>;

		};

	};



	soc {

		compatible = "simple-bus";

		#address-cells = <1>;

		#size-cells = <1>;

		ranges;

		interrupt-parent = <&intc>;



		extbus: extbus {

			compatible = "simple-bus";

			#address-cells = <2>;

			#size-cells = <1>;

};



&soc {

	l2: l2-cache@500c0000 {

		compatible = "socionext,uniphier-system-cache";

			reg = <0x500c0000 0x2000>, <0x503c0100 0x8>,

			      <0x506c0000 0x400>;

		reg = <0x500c0000 0x2000>, <0x503c0100 0x8>, <0x506c0000 0x400>;

		interrupts = <0 190 4>, <0 191 4>;

		cache-unified;

		cache-size = <(2 * 1024 * 1024)>;
@@ -115,8 +103,7 @@ 


	l3: l3-cache@500c8000 {

		compatible = "socionext,uniphier-system-cache";

			reg = <0x500c8000 0x2000>, <0x503c8100 0x8>,

			      <0x506c8000 0x400>;

		reg = <0x500c8000 0x2000>, <0x503c8100 0x8>, <0x506c8000 0x400>;

		interrupts = <0 174 4>, <0 175 4>;

		cache-unified;

		cache-size = <(2 * 1024 * 1024)>;
@@ -125,55 +112,15 @@ 
		cache-level = <3>;

	};



		serial0: serial@54006800 {

			compatible = "socionext,uniphier-uart";

			status = "disabled";

			reg = <0x54006800 0x40>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_uart0>;

			interrupts = <0 33 4>;

			clocks = <&uart_clk>;

		};



		serial1: serial@54006900 {

			compatible = "socionext,uniphier-uart";

			status = "disabled";

			reg = <0x54006900 0x40>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_uart1>;

			interrupts = <0 35 4>;

			clocks = <&uart_clk>;

		};



		serial2: serial@54006a00 {

			compatible = "socionext,uniphier-uart";

			status = "disabled";

			reg = <0x54006a00 0x40>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_uart2>;

			interrupts = <0 37 4>;

			clocks = <&uart_clk>;

		};



		serial3: serial@54006b00 {

			compatible = "socionext,uniphier-uart";

			status = "disabled";

			reg = <0x54006b00 0x40>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_uart3>;

			interrupts = <0 177 4>;

			clocks = <&uart_clk>;

		};



	i2c0: i2c@58780000 {

		compatible = "socionext,uniphier-fi2c";

		status = "disabled";

		reg = <0x58780000 0x80>;

		#address-cells = <1>;

		#size-cells = <0>;

		interrupts = <0 41 4>;

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_i2c0>;

			interrupts = <0 41 4>;

		clocks = <&i2c_clk>;

		clock-frequency = <100000>;

	};
@@ -184,9 +131,9 @@ 
		reg = <0x58781000 0x80>;

		#address-cells = <1>;

		#size-cells = <0>;

		interrupts = <0 42 4>;

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_i2c1>;

			interrupts = <0 42 4>;

		clocks = <&i2c_clk>;

		clock-frequency = <100000>;

	};
@@ -197,9 +144,9 @@ 
		reg = <0x58782000 0x80>;

		#address-cells = <1>;

		#size-cells = <0>;

		interrupts = <0 43 4>;

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_i2c2>;

			interrupts = <0 43 4>;

		clocks = <&i2c_clk>;

		clock-frequency = <100000>;

	};
@@ -210,9 +157,9 @@ 
		reg = <0x58783000 0x80>;

		#address-cells = <1>;

		#size-cells = <0>;

		interrupts = <0 44 4>;

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_i2c3>;

			interrupts = <0 44 4>;

		clocks = <&i2c_clk>;

		clock-frequency = <100000>;

	};
@@ -240,39 +187,8 @@ 
		clocks = <&i2c_clk>;

		clock-frequency = <400000>;

	};



		system-bus-controller@58c00000 {

			compatible = "socionext,uniphier-system-bus-controller";

			reg = <0x58c00000 0x400>, <0x59800000 0x2000>;

};



		pinctrl: pinctrl@5f801000 {

&pinctrl {

	compatible = "socionext,ph1-pro5-pinctrl", "syscon";

			reg = <0x5f801000 0xe00>;

};
 


		timer@60000200 {

			compatible = "arm,cortex-a9-global-timer";

			reg = <0x60000200 0x20>;

			interrupts = <1 11 0x304>;

			clocks = <&arm_timer_clk>;

		};



		timer@60000600 {

			compatible = "arm,cortex-a9-twd-timer";

			reg = <0x60000600 0x20>;

			interrupts = <1 13 0x304>;

			clocks = <&arm_timer_clk>;

		};



		intc: interrupt-controller@60001000 {

			compatible = "arm,cortex-a9-gic";

			#interrupt-cells = <3>;

			interrupt-controller;

			reg = <0x60001000 0x1000>,

			      <0x60000100 0x100>;

		};

	};

};



/include/ "uniphier-pinctrl.dtsi"

arch/arm/boot/dts/uniphier-ph1-sld8.dtsi

+91 −175
Original line number Diff line number Diff line
@@ -42,7 +42,7 @@ 
 *     OTHER DEALINGS IN THE SOFTWARE.

 */



/include/ "skeleton.dtsi"

/include/ "uniphier-common32.dtsi"



/ {

	compatible = "socionext,ph1-sld8";
@@ -78,24 +78,12 @@ 
			clock-frequency = <100000000>;

		};

	};



	soc {

		compatible = "simple-bus";

		#address-cells = <1>;

		#size-cells = <1>;

		ranges;

		interrupt-parent = <&intc>;



		extbus: extbus {

			compatible = "simple-bus";

			#address-cells = <2>;

			#size-cells = <1>;

};



&soc {

	l2: l2-cache@500c0000 {

		compatible = "socionext,uniphier-system-cache";

			reg = <0x500c0000 0x2000>, <0x503c0100 0x4>,

			      <0x506c0000 0x400>;

		reg = <0x500c0000 0x2000>, <0x503c0100 0x4>, <0x506c0000 0x400>;

		interrupts = <0 174 4>, <0 175 4>;

		cache-unified;

		cache-size = <(256 * 1024)>;
@@ -104,59 +92,15 @@ 
		cache-level = <2>;

	};



		serial0: serial@54006800 {

			compatible = "socionext,uniphier-uart";

			status = "disabled";

			reg = <0x54006800 0x40>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_uart0>;

			interrupts = <0 33 4>;

			clocks = <&uart_clk>;

			fifo-size = <64>;

		};



		serial1: serial@54006900 {

			compatible = "socionext,uniphier-uart";

			status = "disabled";

			reg = <0x54006900 0x40>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_uart1>;

			interrupts = <0 35 4>;

			clocks = <&uart_clk>;

			fifo-size = <64>;

		};



		serial2: serial@54006a00 {

			compatible = "socionext,uniphier-uart";

			status = "disabled";

			reg = <0x54006a00 0x40>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_uart2>;

			interrupts = <0 37 4>;

			clocks = <&uart_clk>;

			fifo-size = <64>;

		};



		serial3: serial@54006b00 {

			compatible = "socionext,uniphier-uart";

			status = "disabled";

			reg = <0x54006b00 0x40>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_uart3>;

			interrupts = <0 29 4>;

			clocks = <&uart_clk>;

			fifo-size = <64>;

		};



	i2c0: i2c@58400000 {

		compatible = "socionext,uniphier-i2c";

		status = "disabled";

		reg = <0x58400000 0x40>;

		#address-cells = <1>;

		#size-cells = <0>;

		interrupts = <0 41 1>;

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_i2c0>;

			interrupts = <0 41 1>;

		clocks = <&iobus_clk>;

		clock-frequency = <100000>;

	};
@@ -167,9 +111,9 @@ 
		reg = <0x58480000 0x40>;

		#address-cells = <1>;

		#size-cells = <0>;

		interrupts = <0 42 1>;

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_i2c1>;

			interrupts = <0 42 1>;

		clocks = <&iobus_clk>;

		clock-frequency = <100000>;

	};
@@ -180,9 +124,9 @@ 
		reg = <0x58500000 0x40>;

		#address-cells = <1>;

		#size-cells = <0>;

		interrupts = <0 43 1>;

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_i2c2>;

			interrupts = <0 43 1>;

		clocks = <&iobus_clk>;

		clock-frequency = <400000>;

	};
@@ -193,73 +137,45 @@ 
		reg = <0x58580000 0x40>;

		#address-cells = <1>;

		#size-cells = <0>;

		interrupts = <0 44 1>;

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_i2c3>;

			interrupts = <0 44 1>;

		clocks = <&iobus_clk>;

		clock-frequency = <100000>;

	};



		system-bus-controller@58c00000 {

			compatible = "socionext,uniphier-system-bus-controller";

			reg = <0x58c00000 0x400>, <0x59800000 0x2000>;

		};



	usb0: usb@5a800100 {

		compatible = "socionext,uniphier-ehci", "generic-ehci";

		status = "disabled";

		reg = <0x5a800100 0x100>;

		interrupts = <0 80 4>;

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_usb0>;

			interrupts = <0 80 4>;

	};



	usb1: usb@5a810100 {

		compatible = "socionext,uniphier-ehci", "generic-ehci";

		status = "disabled";

		reg = <0x5a810100 0x100>;

		interrupts = <0 81 4>;

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_usb1>;

			interrupts = <0 81 4>;

	};



	usb2: usb@5a820100 {

		compatible = "socionext,uniphier-ehci", "generic-ehci";

		status = "disabled";

		reg = <0x5a820100 0x100>;

		interrupts = <0 82 4>;

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_usb2>;

			interrupts = <0 82 4>;

		};



		pinctrl: pinctrl@5f801000 {

			compatible = "socionext,ph1-sld8-pinctrl",

				     "syscon";

			reg = <0x5f801000 0xe00>;

	};



		timer@60000200 {

			compatible = "arm,cortex-a9-global-timer";

			reg = <0x60000200 0x20>;

			interrupts = <1 11 0x104>;

			clocks = <&arm_timer_clk>;

};



		timer@60000600 {

			compatible = "arm,cortex-a9-twd-timer";

			reg = <0x60000600 0x20>;

			interrupts = <1 13 0x104>;

			clocks = <&arm_timer_clk>;

&serial3 {

	interrupts = <0 29 4>;

};



		intc: interrupt-controller@60001000 {

			compatible = "arm,cortex-a9-gic";

			#interrupt-cells = <3>;

			interrupt-controller;

			reg = <0x60001000 0x1000>,

			      <0x60000100 0x100>;

		};

&pinctrl {

	compatible = "socionext,ph1-sld8-pinctrl", "syscon";

};
 
};



/include/ "uniphier-pinctrl.dtsi"