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Commit 628d4c46 authored by Daniel Vetter's avatar Daniel Vetter
Browse files

Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux into drm-misc-next 



Resync with drm-next, I have a patch which currently can't be applied
because drm-misc-next lacked the latest drm/i915 code.

Signed-off-by: default avatarDaniel Vetter <daniel.vetter@intel.com>
parents 1e797f55 65d1086c

Documentation/admin-guide/kernel-parameters.txt

+9 −0
Original line number Diff line number Diff line
@@ -653,6 +653,9 @@ 
	cpuidle.off=1	[CPU_IDLE]

			disable the cpuidle sub-system



	cpufreq.off=1	[CPU_FREQ]

			disable the cpufreq sub-system



	cpu_init_udelay=N

			[X86] Delay for N microsec between assert and de-assert

			of APIC INIT to start processors.  This delay occurs
@@ -1183,6 +1186,12 @@ 
			functions that can be changed at run time by the

			set_graph_notrace file in the debugfs tracing directory.



	ftrace_graph_max_depth=<uint>

			[FTRACE] Used with the function graph tracer. This is

			the max depth it will trace into a function. This value

			can be changed at run time by the max_graph_depth file

			in the tracefs tracing directory. default: 0 (no limit)



	gamecon.map[2|3]=

			[HW,JOY] Multisystem joystick and NES/SNES/PSX pad

			support via parallel port (up to 5 devices per port)

Documentation/arm64/silicon-errata.txt

+1 −0
Original line number Diff line number Diff line
@@ -68,3 +68,4 @@ stable kernels. 
|                |                 |                 |                             |

| Qualcomm Tech. | Falkor v1       | E1003           | QCOM_FALKOR_ERRATUM_1003    |

| Qualcomm Tech. | Falkor v1       | E1009           | QCOM_FALKOR_ERRATUM_1009    |

| Qualcomm Tech. | QDF2400 ITS     | E0065           | QCOM_QDF2400_ERRATUM_0065   |

Documentation/cgroup-v2.txt

+6 −5
Original line number Diff line number Diff line
@@ -1142,8 +1142,8 @@ used by the kernel. 


  pids.max



 A read-write single value file which exists on non-root cgroups.  The

 default is "max".

	A read-write single value file which exists on non-root

	cgroups.  The default is "max".



	Hard limit of number of processes.
@@ -1151,7 +1151,8 @@ used by the kernel. 


	A read-only single value file which exists on all cgroups.



 The number of processes currently in the cgroup and its descendants.

	The number of processes currently in the cgroup and its

	descendants.



Organisational operations are not blocked by cgroup policies, so it is

possible to have pids.current > pids.max.  This can be done by either

Documentation/dev-tools/kcov.rst

+1 −1
Original line number Diff line number Diff line
@@ -10,7 +10,7 @@ Note that kcov does not aim to collect as much coverage as possible. It aims 
to collect more or less stable coverage that is function of syscall inputs.

To achieve this goal it does not collect coverage in soft/hard interrupts

and instrumentation of some inherently non-deterministic parts of kernel is

disbled (e.g. scheduler, locking).

disabled (e.g. scheduler, locking).



Usage

-----

Documentation/devicetree/bindings/display/imx/fsl-imx-drm.txt

+58 −1
Original line number Diff line number Diff line
@@ -21,13 +21,19 @@ Freescale i.MX IPUv3 
====================



Required properties:

- compatible: Should be "fsl,<chip>-ipu"

- compatible: Should be "fsl,<chip>-ipu" where <chip> is one of

  - imx51

  - imx53

  - imx6q

  - imx6qp

- reg: should be register base and length as documented in the

  datasheet

- interrupts: Should contain sync interrupt and error interrupt,

  in this order.

- resets: phandle pointing to the system reset controller and

          reset line index, see reset/fsl,imx-src.txt for details

Additional required properties for fsl,imx6qp-ipu:

- fsl,prg: phandle to prg node associated with this IPU instance

Optional properties:

- port@[0-3]: Port nodes with endpoint definitions as defined in

  Documentation/devicetree/bindings/media/video-interfaces.txt.
@@ -53,6 +59,57 @@ ipu: ipu@18000000 { 
	};

};



Freescale i.MX PRE (Prefetch Resolve Engine)

============================================



Required properties:

- compatible: should be "fsl,imx6qp-pre"

- reg: should be register base and length as documented in the

  datasheet

- clocks : phandle to the PRE axi clock input, as described

  in Documentation/devicetree/bindings/clock/clock-bindings.txt and

  Documentation/devicetree/bindings/clock/imx6q-clock.txt.

- clock-names: should be "axi"

- interrupts: should contain the PRE interrupt

- fsl,iram: phandle pointing to the mmio-sram device node, that should be

  used for the PRE SRAM double buffer.



example:



pre@21c8000 {

	compatible = "fsl,imx6qp-pre";

	reg = <0x021c8000 0x1000>;

	interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>;

	clocks = <&clks IMX6QDL_CLK_PRE0>;

	clock-names = "axi";

	fsl,iram = <&ocram2>;

};



Freescale i.MX PRG (Prefetch Resolve Gasket)

============================================



Required properties:

- compatible: should be "fsl,imx6qp-prg"

- reg: should be register base and length as documented in the

  datasheet

- clocks : phandles to the PRG ipg and axi clock inputs, as described

  in Documentation/devicetree/bindings/clock/clock-bindings.txt and

  Documentation/devicetree/bindings/clock/imx6q-clock.txt.

- clock-names: should be "ipg" and "axi"

- fsl,pres: phandles to the PRE units attached to this PRG, with the fixed

  PRE as the first entry and the muxable PREs following.



example:



prg@21cc000 {

	compatible = "fsl,imx6qp-prg";

	reg = <0x021cc000 0x1000>;

	clocks = <&clks IMX6QDL_CLK_PRG0_APB>,

		 <&clks IMX6QDL_CLK_PRG0_AXI>;

	clock-names = "ipg", "axi";

	fsl,pres = <&pre1>, <&pre2>, <&pre3>;

};



Parallel display support

========================