Loading display/lahaina-sde-display.dtsi +1 −9 Original line number Diff line number Diff line Loading @@ -43,14 +43,6 @@ }; &soc { ext_disp: qcom,msm-ext-disp { compatible = "qcom,msm-ext-disp"; ext_disp_audio_codec: qcom,msm-ext-disp-audio-codec-rx { compatible = "qcom,msm-ext-disp-audio-codec-rx"; }; }; dsi_panel_pwr_supply: dsi_panel_pwr_supply { #address-cells = <1>; #size-cells = <0>; Loading Loading @@ -149,7 +141,7 @@ }; &mdss_mdp { connectors = <&sde_wb &sde_dsi>; connectors = <&sde_dp &sde_wb &sde_dsi>; }; /* PHY TIMINGS REVISION YB */ Loading display/lahaina-sde.dtsi +44 −13 Original line number Diff line number Diff line Loading @@ -317,10 +317,22 @@ }; ext_disp: qcom,msm-ext-disp { compatible = "qcom,msm-ext-disp"; ext_disp_audio_codec: qcom,msm-ext-disp-audio-codec-rx { compatible = "qcom,msm-ext-disp-audio-codec-rx"; }; }; sde_dp: qcom,dp_display@ae90000 { cell-index = <0>; compatible = "qcom,dp-display"; status = "disabled"; qcom,dp-aux-switch = <&fsa4480>; qcom,ext-disp = <&ext_disp>; qcom,altmode-parent = "altmode_0"; usb-controller = <&usb0>; reg = <0xae90000 0x0dc>, <0xae90200 0x0c0>, Loading @@ -330,33 +342,36 @@ <0x88ea200 0x200>, <0x88ea600 0x200>, <0xaf02000 0x1a0>, <0x88ea040 0x10>, <0x88ea000 0x200>, <0x88e8000 0x20>, <0x0aee1000 0x034>, <0xae91400 0x094>; /* dp_ctrl: dp_ahb, dp_aux, dp_link, dp_p0 */ <0xae91400 0x094>, <0xaf03000 0x8>; reg-names = "dp_ahb", "dp_aux", "dp_link", "dp_p0", "dp_phy", "dp_ln_tx0", "dp_ln_tx1", "dp_mmss_cc", "dp_pll", "usb3_dp_com", "hdcp_physical", "dp_p1"; "dp_mmss_cc", "dp_pll", "usb3_dp_com", "hdcp_physical", "dp_p1", "gdsc"; interrupt-parent = <&mdss_mdp>; interrupts = <12 0>; #clock-cells = <1>; clocks = <&clock_dispcc DISP_CC_MDSS_DP_AUX_CLK>, <&clock_rpmh RPMH_CXO_CLK>, <&clock_gcc GCC_USB3_PRIM_PHY_PIPE_CLK>, <&clock_dispcc DISP_CC_MDSS_DP_LINK_CLK>, <&clock_dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>, <&clock_dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>, <&sde_dp DP_PHY_PLL_VCO_DIV_CLK>, <&clock_dispcc DISP_CC_MDSS_DP_PIXEL1_CLK_SRC>, <&clock_dispcc DISP_CC_MDSS_DP_PIXEL_CLK>, <&clock_dispcc DISP_CC_MDSS_DP_PIXEL1_CLK>; clock-names = "core_aux_clk", "core_usb_ref_clk_src", "core_usb_pipe_clk", "link_clk", "link_iface_clk", "pixel_clk_rcg", "pixel1_clk_rcg", "pixel_clk_rcg", "pixel_parent", "pixel1_clk_rcg", "strm0_pixel_clk", "strm1_pixel_clk"; qcom,pll-revision = "5nm-v1"; qcom,phy-version = <0x420>; qcom,aux-cfg0-settings = [20 00]; qcom,aux-cfg1-settings = [24 13]; Loading @@ -371,13 +386,13 @@ qcom,max-pclk-frequency-khz = <675000>; qcom,mst-enable; qcom,widebus-enable; qcom,dsc-feature-enable; qcom,fec-feature-enable; qcom,max-dp-dsc-blks = <2>; qcom,max-dp-dsc-input-width-pixs = <2048>; vdda-1p2-supply = <&L6B>; vdda-0p9-supply = <&L1B>; vdd_mx-supply = <&VDD_MXA_LEVEL>; qcom,ctrl-supply-entries { #address-cells = <1>; #size-cells = <0>; Loading @@ -387,7 +402,7 @@ qcom,supply-name = "vdda-1p2"; qcom,supply-min-voltage = <1200000>; qcom,supply-max-voltage = <1200000>; qcom,supply-enable-load = <33000>; qcom,supply-enable-load = <21700>; qcom,supply-disable-load = <0>; }; }; Loading @@ -401,7 +416,7 @@ qcom,supply-name = "vdda-0p9"; qcom,supply-min-voltage = <912000>; qcom,supply-max-voltage = <912000>; qcom,supply-enable-load = <126000>; qcom,supply-enable-load = <115000>; qcom,supply-disable-load = <0>; }; }; Loading @@ -419,6 +434,22 @@ qcom,supply-disable-load = <0>; }; }; qcom,pll-supply-entries { #address-cells = <1>; #size-cells = <0>; qcom,pll-supply-entry@0 { reg = <0>; qcom,supply-name = "vdd_mx"; qcom,supply-min-voltage = <RPMH_REGULATOR_LEVEL_TURBO>; qcom,supply-max-voltage = <RPMH_REGULATOR_LEVEL_MAX>; qcom,supply-enable-load = <0>; qcom,supply-disable-load = <0>; }; }; }; sde_rscc: qcom,sde_rscc@af20000 { Loading Loading
display/lahaina-sde-display.dtsi +1 −9 Original line number Diff line number Diff line Loading @@ -43,14 +43,6 @@ }; &soc { ext_disp: qcom,msm-ext-disp { compatible = "qcom,msm-ext-disp"; ext_disp_audio_codec: qcom,msm-ext-disp-audio-codec-rx { compatible = "qcom,msm-ext-disp-audio-codec-rx"; }; }; dsi_panel_pwr_supply: dsi_panel_pwr_supply { #address-cells = <1>; #size-cells = <0>; Loading Loading @@ -149,7 +141,7 @@ }; &mdss_mdp { connectors = <&sde_wb &sde_dsi>; connectors = <&sde_dp &sde_wb &sde_dsi>; }; /* PHY TIMINGS REVISION YB */ Loading
display/lahaina-sde.dtsi +44 −13 Original line number Diff line number Diff line Loading @@ -317,10 +317,22 @@ }; ext_disp: qcom,msm-ext-disp { compatible = "qcom,msm-ext-disp"; ext_disp_audio_codec: qcom,msm-ext-disp-audio-codec-rx { compatible = "qcom,msm-ext-disp-audio-codec-rx"; }; }; sde_dp: qcom,dp_display@ae90000 { cell-index = <0>; compatible = "qcom,dp-display"; status = "disabled"; qcom,dp-aux-switch = <&fsa4480>; qcom,ext-disp = <&ext_disp>; qcom,altmode-parent = "altmode_0"; usb-controller = <&usb0>; reg = <0xae90000 0x0dc>, <0xae90200 0x0c0>, Loading @@ -330,33 +342,36 @@ <0x88ea200 0x200>, <0x88ea600 0x200>, <0xaf02000 0x1a0>, <0x88ea040 0x10>, <0x88ea000 0x200>, <0x88e8000 0x20>, <0x0aee1000 0x034>, <0xae91400 0x094>; /* dp_ctrl: dp_ahb, dp_aux, dp_link, dp_p0 */ <0xae91400 0x094>, <0xaf03000 0x8>; reg-names = "dp_ahb", "dp_aux", "dp_link", "dp_p0", "dp_phy", "dp_ln_tx0", "dp_ln_tx1", "dp_mmss_cc", "dp_pll", "usb3_dp_com", "hdcp_physical", "dp_p1"; "dp_mmss_cc", "dp_pll", "usb3_dp_com", "hdcp_physical", "dp_p1", "gdsc"; interrupt-parent = <&mdss_mdp>; interrupts = <12 0>; #clock-cells = <1>; clocks = <&clock_dispcc DISP_CC_MDSS_DP_AUX_CLK>, <&clock_rpmh RPMH_CXO_CLK>, <&clock_gcc GCC_USB3_PRIM_PHY_PIPE_CLK>, <&clock_dispcc DISP_CC_MDSS_DP_LINK_CLK>, <&clock_dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>, <&clock_dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>, <&sde_dp DP_PHY_PLL_VCO_DIV_CLK>, <&clock_dispcc DISP_CC_MDSS_DP_PIXEL1_CLK_SRC>, <&clock_dispcc DISP_CC_MDSS_DP_PIXEL_CLK>, <&clock_dispcc DISP_CC_MDSS_DP_PIXEL1_CLK>; clock-names = "core_aux_clk", "core_usb_ref_clk_src", "core_usb_pipe_clk", "link_clk", "link_iface_clk", "pixel_clk_rcg", "pixel1_clk_rcg", "pixel_clk_rcg", "pixel_parent", "pixel1_clk_rcg", "strm0_pixel_clk", "strm1_pixel_clk"; qcom,pll-revision = "5nm-v1"; qcom,phy-version = <0x420>; qcom,aux-cfg0-settings = [20 00]; qcom,aux-cfg1-settings = [24 13]; Loading @@ -371,13 +386,13 @@ qcom,max-pclk-frequency-khz = <675000>; qcom,mst-enable; qcom,widebus-enable; qcom,dsc-feature-enable; qcom,fec-feature-enable; qcom,max-dp-dsc-blks = <2>; qcom,max-dp-dsc-input-width-pixs = <2048>; vdda-1p2-supply = <&L6B>; vdda-0p9-supply = <&L1B>; vdd_mx-supply = <&VDD_MXA_LEVEL>; qcom,ctrl-supply-entries { #address-cells = <1>; #size-cells = <0>; Loading @@ -387,7 +402,7 @@ qcom,supply-name = "vdda-1p2"; qcom,supply-min-voltage = <1200000>; qcom,supply-max-voltage = <1200000>; qcom,supply-enable-load = <33000>; qcom,supply-enable-load = <21700>; qcom,supply-disable-load = <0>; }; }; Loading @@ -401,7 +416,7 @@ qcom,supply-name = "vdda-0p9"; qcom,supply-min-voltage = <912000>; qcom,supply-max-voltage = <912000>; qcom,supply-enable-load = <126000>; qcom,supply-enable-load = <115000>; qcom,supply-disable-load = <0>; }; }; Loading @@ -419,6 +434,22 @@ qcom,supply-disable-load = <0>; }; }; qcom,pll-supply-entries { #address-cells = <1>; #size-cells = <0>; qcom,pll-supply-entry@0 { reg = <0>; qcom,supply-name = "vdd_mx"; qcom,supply-min-voltage = <RPMH_REGULATOR_LEVEL_TURBO>; qcom,supply-max-voltage = <RPMH_REGULATOR_LEVEL_MAX>; qcom,supply-enable-load = <0>; qcom,supply-disable-load = <0>; }; }; }; sde_rscc: qcom,sde_rscc@af20000 { Loading